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AJvYcCVn7cQ/Cctu382WVP5Enq3TMQwhIx8qY8frrvkONTPN+YBr4z0BTz5Y8hMtbC96HcBI8KRZRZnQGLPlSNTL2iPzPZHsu2kWhgTJI2k6rldB/iueHWSoxiQOHcsqt9ZMc0r+h0TYCrai/iq3jmEDAvjma8PdCNVaaqF9oazdPq85x7lvMCG5On3SarXZRCdVHZdjuCWkhmrPwJWYG0CwUGpO78JhSlzcHA== X-Gm-Message-State: AOJu0YyIbPywoj0W/BvufAJxqPyHSWVIM31aBJq2jzEtsXWJ4xVJdAmF FeX21UoLtIF6hU/y6PIg2xLQlt+k5OBU0JnIhH/fN2L6XljFr6Xtv+F6or7fAUiDx8vh4HAZAUu K979MOIf2CSc4h8YkgX6SmfV7nc4= X-Received: by 2002:a05:622a:1991:b0:43d:dc3c:3c5e with SMTP id d75a77b69052e-43fb0e512b0mr165482981cf.1.1716924899362; Tue, 28 May 2024 12:34:59 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240423175900.702640-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20240423175900.702640-8-prabhakar.mahadev-lad.rj@bp.renesas.com> In-Reply-To: From: "Lad, Prabhakar" Date: Tue, 28 May 2024 20:33:48 +0100 Message-ID: Subject: Re: [PATCH v2 07/13] pinctrl: renesas: pinctrl-rzg2l: Add function pointer for writing to PMC register To: Geert Uytterhoeven Cc: Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Magnus Damm , linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Biju Das , Fabrizio Castro , Lad Prabhakar Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Geert, Thank you for the review. On Wed, May 22, 2024 at 1:39=E2=80=AFPM Geert Uytterhoeven wrote: > > Hi Prabhakar, > > On Tue, Apr 23, 2024 at 7:59=E2=80=AFPM Prabhakar wrote: > > From: Lad Prabhakar > > > > This patch introduces a function pointer, pmc_writeb(), in the > > struct rzg2l_pinctrl_data to facilitate writing to the PMC register. On > > the RZ/V2H(P) SoC, unlocking the PWPR.REGWE_A bit before writing to PMC > > registers is required, whereas this is not the case for the existing > > RZ/G2L family. This addition enables the reuse of existing code for > > RZ/V2H(P). Additionally, this patch populates this function pointer wit= h > > appropriate data for existing SoCs. > > > > Note that this functionality is only handled in rzg2l_gpio_request(), a= s > > PMC unlock/lock during PFC setup will be taken care of in the > > pwpr_pfc_unlock/pwpr_pfc_lock. > > > > Signed-off-by: Lad Prabhakar > > --- > > RFC->v2 > > - No change > > Thanks for the update! > > > --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c > > +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c > > @@ -463,6 +464,11 @@ static const struct rzg2l_variable_pin_cfg r9a07g0= 43f_variable_pin_cfg[] =3D { > > }; > > #endif > > > > +static void rzg2l_pmc_writeb(struct rzg2l_pinctrl *pctrl, u8 val, void= __iomem *addr) > > Please pass the register offset instead of the virtual register address. > You do have pctrl->base here, and rzv2h_pmc_writeb() will need to use > pctrl->base for all other register writes anyway. > Agreed, I will pass the register offset (u16 offset) instead of virtual address. Cheers, Prabhakar