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AJvYcCX2p4hHWLzQFQVCwfoKhbuDizy4HkzwL+ZgbYxqp8QwD2sxtb5RKv92G6T9GRhuzfZT/kA08i9SRlH3HW3A95X6hojOgCcuuN+k732P X-Gm-Message-State: AOJu0YwagPZsMfjpHf5nyEdx6NRZA28Cks1wghDKK4XQaJEKW26FYjHK exRhCItZL78k5V9nY/FDC+pkUsuo8Ru8RYHxuMMx6b9UKycmGCxWplcAqxrDcpo= X-Received: by 2002:a19:7606:0:b0:520:ed4e:2206 with SMTP id 2adb3069b0e04-52a7900dcdemr45781e87.17.1716929019918; Tue, 28 May 2024 13:43:39 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5297066b885sm1095493e87.127.2024.05.28.13.43.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 May 2024 13:43:39 -0700 (PDT) From: Dmitry Baryshkov Date: Tue, 28 May 2024 23:43:24 +0300 Subject: [PATCH 06/10] ARM: dts: qcom: apq8064: drop #power-domain-cells property of GCC Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20240528-qcom-gdscs-v1-6-03cf1b102a4f@linaro.org> References: <20240528-qcom-gdscs-v1-0-03cf1b102a4f@linaro.org> In-Reply-To: <20240528-qcom-gdscs-v1-0-03cf1b102a4f@linaro.org> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Taniya Das , Robert Marko , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=816; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=07w4w+wcz+s8WoLWWVideIAadh1jMDKIz4U0xNk1izU=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmVkH1JVlxhFsDmBqnNXEoEupNMoWbv0zsZYUHR jq6uLZmgu2JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZlZB9QAKCRCLPIo+Aiko 1bjAB/sF2oaL3QqTuQsxtb9JRW5yMofX0D4ckQRWhuzF65jn3xqEN/qhCXu55vcV6F0wjNScKXQ 112dQQMozsVEC2O+qlcCc3nOpR3snwQ3ENZwQJ1gLB3igSOGD0XGtmv5m0t6zgdUNKncRq4pQJU JjIzct6TiCB5maUvIcUA4vrJE7ot209GHoBEdm0ku/6yu0bs4bbp4MeR+wUuQGTOUBoPX15gAPq mTt8OcPoui4hGQz74B7RMM5pCCyxwZ8MgSVSN97MyckDX5xesU+X6x/QRFxg0vsyKj1b6q6KdES obR11jgG1szbRyaF7hjDysMlvJSCzVXfOKOBgRbQuwwh8iEj X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A On APQ8064 the Global Clock Controller (GCC) doesn't provide power domains. Drop the #power-domain-cells property from the controller device node. Signed-off-by: Dmitry Baryshkov --- arch/arm/boot/dts/qcom/qcom-apq8064.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi index 11e60b74c3c9..178a3b424670 100644 --- a/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi @@ -684,7 +684,6 @@ gcc: clock-controller@900000 { compatible = "qcom,gcc-apq8064", "syscon"; reg = <0x00900000 0x4000>; #clock-cells = <1>; - #power-domain-cells = <1>; #reset-cells = <1>; clocks = <&cxo_board>, <&pxo_board>, -- 2.39.2