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AJvYcCXstDCAqAjcT853An4I1hB0ptu4GviH+uERczlo3VMOK3xsGN7xPzmLe6k6nXKS3it6bwP1XB9QUivL991dk7i4eXYyAIomF8FE/aEX X-Gm-Message-State: AOJu0Yz47bkZ1SRsTjnZ6MZv5tbJ7pIlyOJM+bu8p/VK0vy8BUkxg4Zz 0cIatdepZL99NdvUO9qDigRicr9vKpnt4OaA0DanLBt9k+nwElVeIOEApoZ3gkA= X-Received: by 2002:a19:9104:0:b0:51a:bebb:690c with SMTP id 2adb3069b0e04-529645e331fmr8152294e87.12.1716929021550; Tue, 28 May 2024 13:43:41 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5297066b885sm1095493e87.127.2024.05.28.13.43.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 May 2024 13:43:41 -0700 (PDT) From: Dmitry Baryshkov Date: Tue, 28 May 2024 23:43:25 +0300 Subject: [PATCH 07/10] ARM: dts: qcom: msm8660: drop #power-domain-cells property of GCC Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20240528-qcom-gdscs-v1-7-03cf1b102a4f@linaro.org> References: <20240528-qcom-gdscs-v1-0-03cf1b102a4f@linaro.org> In-Reply-To: <20240528-qcom-gdscs-v1-0-03cf1b102a4f@linaro.org> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Taniya Das , Robert Marko , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=824; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=efm+IHUJ1gyGBEQDbtWwDLgNHtx+hRJSWzbFoBIcMe8=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmVkH1PiaA7rMYukGgZW/ppDwT/j0XCoKa/xJ7e ytJq3x1L7GJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZlZB9QAKCRCLPIo+Aiko 1XHjCAClBiTfjCpf1OW82jhz6TmnZNpwcb83AFpnS4PlCGcjBbRosPVnb2roSsDDVPTVImuG5J1 ZvsrptyUH14OWU0UgjvLWmfImws4YBEQe8TnIFHHtuD07g8qtACsTPzxGxIeV9ppmZLcH4TtiBm OFrq4YZGg+RDHRspPrVINi+5MxZm43CejKyAWzYnKhIxpEfdvwR5xxdsA1PRJJpaMUTJ1JlWaBh reLZDuX9Ln8Mkl4E5Pe4dBdM5qywjETymneM+8Hx5btVNc3h9jA6ZE/78OTPkZgmNKe6u4v+rBE n4a2EaSVeduvVX4N2x0OkcgIjkfCUzQsn3wvIJ4X+kpn3zKA X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A On MSM8660 the Global Clock Controller (GCC) doesn't provide power domains. Drop the #power-domain-cells property from the controller device node. Signed-off-by: Dmitry Baryshkov --- arch/arm/boot/dts/qcom/qcom-msm8660.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8660.dtsi index 455ba4bf1bf4..a66c474cd1aa 100644 --- a/arch/arm/boot/dts/qcom/qcom-msm8660.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-msm8660.dtsi @@ -113,7 +113,6 @@ tlmm: pinctrl@800000 { gcc: clock-controller@900000 { compatible = "qcom,gcc-msm8660"; #clock-cells = <1>; - #power-domain-cells = <1>; #reset-cells = <1>; reg = <0x900000 0x4000>; clocks = <&pxo_board>, <&cxo_board>; -- 2.39.2