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AJvYcCV8E4YWEhQojFXyH1XTXJnhOmrbkDp82lTWwwHejYAXThtwNf5ozlRBOp6P63sqk5IXLSjrkDoXgwXWe/mVNjyCqdyyglRGrPhDU/mEE/SxDqNeAw3tz230OiCsAC8MWmC9U0+1T619wDkp8jN7/eAk1Ur5RkUpiIgHJ7svsxfzWKs= X-Gm-Message-State: AOJu0YxJ/vUWlQ06nxIBkeyaS8Xm6PqZ7gB1DizWoRHcfyBrqxqq0qCE nMgWRc8owTZ2SXLRvQWdvhjxeg0bWPDrPZyksw3aXkiM2/yhIxcVxyfQ1COai63DxQge+Vj18Df gr1MJMcMgg1RJNo/qd63mckaSjE/trWeL X-Received: by 2002:a17:906:314e:b0:a59:c319:f1dc with SMTP id a640c23a62f3a-a62642daa92mr970246166b.4.1716963810113; Tue, 28 May 2024 23:23:30 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240528190315.3865-1-laurent.pinchart@ideasonboard.com> <20240528190315.3865-5-laurent.pinchart@ideasonboard.com> <20240528202705.GD8500@pendragon.ideasonboard.com> In-Reply-To: <20240528202705.GD8500@pendragon.ideasonboard.com> From: Andy Shevchenko Date: Wed, 29 May 2024 09:22:54 +0300 Message-ID: Subject: Re: [PATCH v2 4/4] pwm: adp5585: Add Analog Devices ADP5585 support To: Laurent Pinchart Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pwm@vger.kernel.org, Alexandru Ardelean , Bartosz Golaszewski , Conor Dooley , Krzysztof Kozlowski , Lee Jones , Linus Walleij , Rob Herring , =?UTF-8?Q?Uwe_Kleine=2DK=C3=B6nig?= , Clark Wang Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Tue, May 28, 2024 at 11:27=E2=80=AFPM Laurent Pinchart wrote: > On Tue, May 28, 2024 at 10:41:51PM +0300, Andy Shevchenko wrote: > > Tue, May 28, 2024 at 10:03:14PM +0300, Laurent Pinchart kirjoitti: .. > > > +#define ADP5585_PWM_OSC_FREQ_HZ 1000000U > > > > (1 * HZ_PER_MHZ) ? > > If we had an MHZ macro I would use 1 * MHZ, but I don't think HZ_PER_MHZ > improves readability here. We have MEGA. HZ is already the suffix in this definition. > > > +#define ADP5585_PWM_MIN_PERIOD_NS (2ULL * NSEC_PER_SEC / ADP5585_PW= M_OSC_FREQ_HZ) > > > +#define ADP5585_PWM_MAX_PERIOD_NS (2ULL * 0xffff * NSEC_PER_SEC / A= DP5585_PWM_OSC_FREQ_HZ) > > > > Wouldn't be better to use GENMASK() or (BIT(x) - 1) notation to show th= at > > the limit is due to HW register bits in use? > > I think that would decrease readability to be honest. I think it improves the robustness of the code. I always fail to count 3,4,5,6 f:s in those masks, using BIT()/GENMASK() notation makes it better. .. > > > + ret =3D regmap_write(regmap, ADP5585_PWM_OFFT_LOW, > > > + off & 0xff); > > > + if (ret) > > > + return ret; > > > + ret =3D regmap_write(regmap, ADP5585_PWM_OFFT_HIGH, > > > + (off >> 8) & 0xff); > > > + if (ret) > > > + return ret; > > > + ret =3D regmap_write(regmap, ADP5585_PWM_ONT_LOW, > > > + on & 0xff); > > > + if (ret) > > > + return ret; > > > + ret =3D regmap_write(regmap, ADP5585_PWM_ONT_HIGH, > > > + (on >> 8) & 0xff); > > > + if (ret) > > > + return ret; > > > > Can be proper __le16/__be16 be used in conjunction with regmap bulk API= ? > > What I would really like is regmap growing an API similar to > include/media/v4l2-cci.h. Any volunteer ? :-) So, the answer here is yes? .. > > > + regmap_read(regmap, ADP5585_PWM_OFFT_LOW, &off); > > > + regmap_read(regmap, ADP5585_PWM_OFFT_HIGH, &val); > > > + off |=3D val << 8; > > > + > > > + regmap_read(regmap, ADP5585_PWM_ONT_LOW, &on); > > > + regmap_read(regmap, ADP5585_PWM_ONT_HIGH, &val); > > > + on |=3D val << 8; > > > > As per above, can it be converted to use proper __le16/__be16 type and > > regmap bulk API? > > As there are only 2 registers, I think that's a bit overkill really. I do not think so. It increases readability (less LoCs) and improves a lot of understanding of the hardware layout from reading the code. Please, consider using it. .. > > > + device_set_of_node_from_dev(dev, dev->parent); > > > > Why this one? What's wrong with device_set_node()? > > See my reply to 3/4. See additional questions there as well. --=20 With Best Regards, Andy Shevchenko