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[2001:14ba:a0c3:3a00::227]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-2e95bcc48c8sm25085331fa.14.2024.05.29.01.21.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 May 2024 01:21:03 -0700 (PDT) Date: Wed, 29 May 2024 11:21:02 +0300 From: Dmitry Baryshkov To: Lu Baolu Cc: Joerg Roedel , Will Deacon , Robin Murphy , Jason Gunthorpe , Kevin Tian , Yi Liu , David Airlie , Daniel Vetter , Kalle Valo , Bjorn Andersson , Mathieu Poirier , Alex Williamson , mst@redhat.com, Jason Wang , Thierry Reding , Jonathan Hunter , Mikko Perttunen , iommu@lists.linux.dev, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 06/20] drm/msm: Use iommu_paging_domain_alloc() Message-ID: References: <20240529053250.91284-1-baolu.lu@linux.intel.com> <20240529053250.91284-7-baolu.lu@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240529053250.91284-7-baolu.lu@linux.intel.com> On Wed, May 29, 2024 at 01:32:36PM +0800, Lu Baolu wrote: > The domain allocated in msm_iommu_new() is for the @dev. Replace > iommu_domain_alloc() with iommu_paging_domain_alloc() to make it explicit. > > Update msm_iommu_new() to always return ERR_PTR in failure cases instead > of NULL. Please don't mix unrelated changes, because ... > > Signed-off-by: Lu Baolu > --- > drivers/gpu/drm/msm/msm_iommu.c | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/msm/msm_iommu.c b/drivers/gpu/drm/msm/msm_iommu.c > index d5512037c38b..f7e28d4b5f62 100644 > --- a/drivers/gpu/drm/msm/msm_iommu.c > +++ b/drivers/gpu/drm/msm/msm_iommu.c > @@ -407,9 +407,9 @@ struct msm_mmu *msm_iommu_new(struct device *dev, unsigned long quirks) > struct msm_iommu *iommu; > int ret; > > - domain = iommu_domain_alloc(dev->bus); > - if (!domain) > - return NULL; > + domain = iommu_paging_domain_alloc(dev); > + if (IS_ERR(domain)) > + return ERR_CAST(domain); > > iommu_set_pgtable_quirks(domain, quirks); > > @@ -441,7 +441,7 @@ struct msm_mmu *msm_iommu_gpu_new(struct device *dev, struct msm_gpu *gpu, unsig > struct msm_mmu *mmu; > > mmu = msm_iommu_new(dev, quirks); > - if (IS_ERR_OR_NULL(mmu)) > + if (IS_ERR(mmu)) > return mmu; NAK, not having an IOMMU is a poor but legit usecase for some of devices which don't have IOMMU support yet (for example because of the buggy implementation for which we were not able to get all the hooks in). Please don't break compatibility for existing platforms. > > iommu = to_msm_iommu(mmu); > -- > 2.34.1 > -- With best wishes Dmitry