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Wed, 29 May 2024 11:45:00 +0100 Date: Wed, 29 May 2024 11:44:58 +0100 Message-ID: <86a5k8nbh1.wl-maz@kernel.org> From: Marc Zyngier To: Anup Patel Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-riscv@lists.infradead.org, Saravana Kannan , Rob Herring Subject: Re: [PATCH] of: property: Fix fw_devlink handling of interrupt-map In-Reply-To: References: <20240528164132.2451685-1-maz@kernel.org> <86bk4pm8j1.wl-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.2 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: apatel@ventanamicro.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-riscv@lists.infradead.org, saravanak@google.com, robh@kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Wed, 29 May 2024 11:16:30 +0100, Anup Patel wrote: >=20 > On Wed, May 29, 2024 at 12:03=E2=80=AFPM Marc Zyngier wr= ote: > > > > On Wed, 29 May 2024 06:15:52 +0100, > > Anup Patel wrote: > > > > > > On Tue, May 28, 2024 at 10:11=E2=80=AFPM Marc Zyngier wrote: > > > > > > > > Commit d976c6f4b32c ("of: property: Add fw_devlink support for > > > > interrupt-map property") tried to do what it says on the tin, > > > > but failed on a couple of points: > > > > > > > > - it confuses bytes and cells. Not a huge deal, except when it > > > > comes to pointer arithmetic > > > > > > > > - it doesn't really handle anything but interrupt-maps that have > > > > their parent #address-cells set to 0 > > > > > > > > The combinations of the two leads to some serious fun on my M1 > > > > box, with plenty of WARN-ON() firing all over the shop, and > > > > amusing values being generated for interrupt specifiers. > > > > > > > > Address both issues so that I can boot my machines again. > > > > > > > > Fixes: d976c6f4b32c ("of: property: Add fw_devlink support for inte= rrupt-map property") > > > > Signed-off-by: Marc Zyngier > > > > Cc: Anup Patel > > > > Cc: Saravana Kannan > > > > Cc: Rob Herring (Arm) > > > > > > Thanks for the fix patch but unfortunately it breaks for RISC-V. > > > > > > > --- > > > > drivers/of/property.c | 16 ++++++++++++++-- > > > > 1 file changed, 14 insertions(+), 2 deletions(-) > > > > > > > > diff --git a/drivers/of/property.c b/drivers/of/property.c > > > > index 1c83e68f805b..9adebc63bea9 100644 > > > > --- a/drivers/of/property.c > > > > +++ b/drivers/of/property.c > > > > @@ -1322,7 +1322,13 @@ static struct device_node *parse_interrupt_m= ap(struct device_node *np, > > > > addrcells =3D of_bus_n_addr_cells(np); > > > > > > > > imap =3D of_get_property(np, "interrupt-map", &imaplen); > > > > - if (!imap || imaplen <=3D (addrcells + intcells)) > > > > + imaplen /=3D sizeof(*imap); > > > > + > > > > + /* > > > > + * Check that we have enough runway for the child unit inte= rrupt > > > > + * specifier and a phandle. That's the bare minimum we can = expect. > > > > + */ > > > > + if (!imap || imaplen <=3D (addrcells + intcells + 1)) > > > > return NULL; > > > > imap_end =3D imap + imaplen; > > > > > > > > @@ -1346,8 +1352,14 @@ static struct device_node *parse_interrupt_m= ap(struct device_node *np, > > > > if (!index) > > > > return sup_args.np; > > > > > > > > - of_node_put(sup_args.np); > > > > + /* > > > > + * Account for the full parent unit interrupt speci= fier > > > > + * (address cells, interrupt cells, and phandle). > > > > + */ > > > > + imap +=3D of_bus_n_addr_cells(sup_args.np); > > > > > > This breaks for RISC-V because we don't have "#address-cells" > > > property in interrupt controller DT node and of_bus_n_addr_cells() > > > retrieves "#address-cells" from the parent of interrupt controller. > > > > That's a feature, not a bug. #address-cells, AFAICT, applies to all > > child nodes until you set it otherwise. > > > > > > > > The of_irq_parse_raw() looks for "#address-cells" property > > > in the interrupt controller DT node only so we should do a > > > similar thing here as well. > > > > This looks more like a of_irq_parse_raw() bug than anything else. >=20 > If we change of_irq_parse_raw() to use of_bus_n_addr_cells() > then it would still break for RISC-V. I'm not trying to "fix" riscv. I'm merely outlining that you are relying on both broken DTs and a buggy OS. >=20 > Using of_bus_n_addr_cells() over here forces interrupt controller > DT nodes to have a "#address-cells" DT property. There are many > interrupt controller (e.g. RISC-V PLIC or RISC-V APLIC) where the > DT bindings don't require "#address-cells" DT property and existing > DTS files with such interrupt controllers don't have it either. It forces you to set #address-cells *if you rely on a different value in a child node*. It's not like the semantics are new. >=20 > In the RISC-V world, there have been quite a few QEMU releases > where the generated DT node of the interrupt controller does not > have the "#address-cells" property. This patch breaks the kernel > for all such QEMU releases. Congratulations, you've forked DT. News at 11. >=20 > I think we should align the implementation in parse_interrupt_map() > with of_irq_parse_raw() and use of_property_read_u32() instead of > of_bus_n_addr_cells(). I think we should fix the kernel and quirk riscv as broken, just like PPC or sparc. M. --=20 Without deviation from the norm, progress is not possible.