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bh=FyH5HBgVMHtwGihnpxCP6snZm//fPikPnLspFypYdbE=; b=llyl+NA/qOCy5tsw1lX41EVJSnbWFY1/6KVScpuBiNoN0oE4vY9B/88mMxHwNf9FWL qvvAqU+7kcKL86LsHNZzyiqckLNo4Vn30vt+5SCVmmVeN2iGLhWvCR1hGJBvdpOB7DDO 9Ox7GKPxKiiKGbOBXWw3jBXoDaMNxyEJ8hz5TnfvynT+Qilty+lP430P+h27rrLBEGW+ JoVC6ANODlkhB5XzTBVL43+d49fil2Tf0zVTeJsjRq75FFWmoHZyLbEluWC2at6qozzo 6MqNpRMjGg93qsIthzy6CQj6BUb4Aw4zGygdnq549D6BXgmJh6CusLjcJ9uKjDfnHkJq hkNA== X-Forwarded-Encrypted: i=1; AJvYcCXTWDPPwvzA5UdtM66kWbHbGDotsO0zQ0TdGjt8z5M6cmoGVluKSvRdyEZVuNTyaahq6WHZQ5kuqZsZfEd2meWT0rrRzH6M5Qe1MOvW X-Gm-Message-State: AOJu0Yzicr92zGLrDcnSDHPehCTLAfhwsw7454eeWYe2oDeDe6HL/XD0 L17+ORSjjv/8Pdie//qvAAe9zrnMUu5DlmUskl2NkILngn/kSrZ7nPTzk0Cg3Qb8fgrceImFo2s 98EMAJgJOropbNlsapFTKh8C0dGtCv7S0dwMiCw== X-Received: by 2002:a17:906:66c7:b0:a59:ba2b:5915 with SMTP id a640c23a62f3a-a6265119463mr1826137066b.50.1716985244596; Wed, 29 May 2024 05:20:44 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240528151052.313031-1-alexghiti@rivosinc.com> <20240528151052.313031-2-alexghiti@rivosinc.com> <20240528-repaint-graffiti-ec4f0e038e5a@spud> In-Reply-To: <20240528-repaint-graffiti-ec4f0e038e5a@spud> From: Alexandre Ghiti Date: Wed, 29 May 2024 14:20:33 +0200 Message-ID: Subject: Re: [PATCH 1/7] riscv: Implement cmpxchg32/64() using Zacas To: Conor Dooley Cc: Jonathan Corbet , Paul Walmsley , Palmer Dabbelt , Albert Ou , Peter Zijlstra , Ingo Molnar , Will Deacon , Waiman Long , Boqun Feng , Arnd Bergmann , Leonardo Bras , Guo Ren , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-arch@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Conor, On Tue, May 28, 2024 at 5:34=E2=80=AFPM Conor Dooley wro= te: > > On Tue, May 28, 2024 at 05:10:46PM +0200, Alexandre Ghiti wrote: > > This adds runtime support for Zacas in cmpxchg operations. > > > > Signed-off-by: Alexandre Ghiti > > --- > > arch/riscv/Kconfig | 17 +++++++++++++++++ > > arch/riscv/Makefile | 11 +++++++++++ > > arch/riscv/include/asm/cmpxchg.h | 23 ++++++++++++++++++++--- > > 3 files changed, 48 insertions(+), 3 deletions(-) > > > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > > index 8a0f403432e8..b443def70139 100644 > > --- a/arch/riscv/Kconfig > > +++ b/arch/riscv/Kconfig > > @@ -579,6 +579,23 @@ config RISCV_ISA_V_PREEMPTIVE > > preemption. Enabling this config will result in higher memory > > consumption due to the allocation of per-task's kernel Vector c= ontext. > > > > +config TOOLCHAIN_HAS_ZACAS > > + bool > > + default y > > + depends on !64BIT || $(cc-option,-mabi=3Dlp64 -march=3Drv64ima_za= cas) > > + depends on !32BIT || $(cc-option,-mabi=3Dilp32 -march=3Drv32ima_z= acas) > > + depends on AS_HAS_OPTION_ARCH > > + > > +config RISCV_ISA_ZACAS > > + bool "Zacas extension support for atomic CAS" > > + depends on TOOLCHAIN_HAS_ZACAS > > + default y > > + help > > + Adds support to use atomic CAS instead of LR/SC to implement ke= rnel > > + atomic cmpxchg operation. > > If you were a person compiling a kernel, would you be able to read this > and realise that this is safe to enable when their system does not > support atomic CAS? Please take a look at other how other extensions > handle this, or the patch that I have been sending that tries to make > things clearer: > https://patchwork.kernel.org/project/linux-riscv/patch/20240528-varnish-s= tatus-9c22973093a0@spud/ Ok, I will go for: "Enable the use of the Zacas ISA-extension to implement atomic cmpxchg operations when it is detected at boot." And I will do the same for Zabha. > > > + > > + If you don't know what to do here, say Y. > > + > > config TOOLCHAIN_HAS_ZBB > > bool > > default y > > diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile > > index 5b3115a19852..d5b60b87998c 100644 > > --- a/arch/riscv/Makefile > > +++ b/arch/riscv/Makefile > > @@ -78,6 +78,17 @@ endif > > # Check if the toolchain supports Zihintpause extension > > riscv-march-$(CONFIG_TOOLCHAIN_HAS_ZIHINTPAUSE) :=3D $(riscv-march-y)_= zihintpause > > > > +# Check if the toolchain supports Zacas > > +ifdef CONFIG_AS_IS_LLVM > > +# Support for experimental Zacas was merged in LLVM 17, but the remova= l of > > +# the "experimental" was merged in LLVM 19. > > +KBUILD_CFLAGS +=3D -menable-experimental-extensions > > +KBUILD_AFLAGS +=3D -menable-experimental-extensions > > +riscv-march-y :=3D $(riscv-march-y)_zacas1p0 > > +else > > +riscv-march-$(CONFIG_TOOLCHAIN_HAS_ZACAS) :=3D $(riscv-march-y)_zacas > > +endif > > I'm almost certain that we discussed this before for vector and it was > decided to not enable experimental extensions (particularly as it is a > global option), and instead require the non-experimental versions. > This isn't even consistent with your TOOLCHAIN_HAS_ZACAS checks, that > will only enable the option for the ratified version. Zacas was ratified, hence the removal of "experimental" in LLVM 19. But unfortunately Zabha lacks such changes in LLVM, so that will make this inconsistent (ratified extension but still experimental). I'll remove the enablement of the experimental extensions then so that will fail for LLVM < 19. And for Zabha, I'll try to push the removal of experimental from LLVM. > I think we should > continue to avoid enabling experimental extensions, even if that imposes > a requirement of having a bleeding edge toolchain to actually use the > extension. Would it make sense to have a CONFIG_RISCV_LLVM_ENABLE_EXPERIMENTAL_EXTENSIONS or similar? So that people who want to play with those extensions will still be able to do so without patching the kernel? Thanks, Alex > > Thanks, > Conor.