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References: <20240516062455.106266-1-alexander.stein@ew.tq-group.com> <20240516062455.106266-4-alexander.stein@ew.tq-group.com>
In-Reply-To: <20240516062455.106266-4-alexander.stein@ew.tq-group.com>
From: Robert Foss <rfoss@kernel.org>
Date: Wed, 29 May 2024 16:06:21 +0200
Message-ID: <CAN6tsi4VCnRD7gj0c0feFdfjcRbYVGdud8M=qEit-uGHrnqyTQ@mail.gmail.com>
Subject: Re: [PATCH v2 3/3] drm/bridge: tc358767: Support write-only registers
To: Alexander Stein <alexander.stein@ew.tq-group.com>
Cc: Andrzej Hajda <andrzej.hajda@intel.com>, Neil Armstrong <neil.armstrong@linaro.org>, 
	Laurent Pinchart <Laurent.pinchart@ideasonboard.com>, Jonas Karlman <jonas@kwiboo.se>, 
	Jernej Skrabec <jernej.skrabec@gmail.com>, 
	Maarten Lankhorst <maarten.lankhorst@linux.intel.com>, Maxime Ripard <mripard@kernel.org>, 
	Thomas Zimmermann <tzimmermann@suse.de>, David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>, 
	dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org
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On Thu, May 16, 2024 at 8:25=E2=80=AFAM Alexander Stein
<alexander.stein@ew.tq-group.com> wrote:
>
> Most registers are read-writable, but some are only RO or even WO.
> regmap does not support using readable_reg and wr_table when outputting
> in debugfs, so switch to writeable_reg.
> First check for RO or WO registers and fallback tc_readable_reg() for the
> leftover RW registers.
>
> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
> ---
>  drivers/gpu/drm/bridge/tc358767.c | 40 ++++++++++++++++++++-----------
>  1 file changed, 26 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/t=
c358767.c
> index 8874713bdd4a4..04c98ab1991bd 100644
> --- a/drivers/gpu/drm/bridge/tc358767.c
> +++ b/drivers/gpu/drm/bridge/tc358767.c
> @@ -2086,19 +2086,31 @@ static const struct regmap_access_table tc_precio=
us_table =3D {
>         .n_yes_ranges =3D ARRAY_SIZE(tc_precious_ranges),
>  };
>
> -static const struct regmap_range tc_non_writeable_ranges[] =3D {
> -       regmap_reg_range(PPI_BUSYPPI, PPI_BUSYPPI),
> -       regmap_reg_range(DSI_BUSYDSI, DSI_BUSYDSI),
> -       regmap_reg_range(DSI_LANESTATUS0, DSI_INTSTATUS),
> -       regmap_reg_range(TC_IDREG, SYSSTAT),
> -       regmap_reg_range(GPIOI, GPIOI),
> -       regmap_reg_range(DP0_LTSTAT, DP0_SNKLTCHGREQ),
> -};
> -
> -static const struct regmap_access_table tc_writeable_table =3D {
> -       .no_ranges =3D tc_non_writeable_ranges,
> -       .n_no_ranges =3D ARRAY_SIZE(tc_non_writeable_ranges),
> -};
> +static bool tc_writeable_reg(struct device *dev, unsigned int reg)
> +{
> +       /* RO reg */
> +       switch (reg) {
> +       case PPI_BUSYPPI:
> +       case DSI_BUSYDSI:
> +       case DSI_LANESTATUS0:
> +       case DSI_LANESTATUS1:
> +       case DSI_INTSTATUS:
> +       case TC_IDREG:
> +       case SYSBOOT:
> +       case SYSSTAT:
> +       case GPIOI:
> +       case DP0_LTSTAT:
> +       case DP0_SNKLTCHGREQ:
> +               return false;
> +       }
> +       /* WO reg */
> +       switch (reg) {
> +       case DSI_STARTDSI:
> +       case DSI_INTCLR:
> +               return true;
> +       }
> +       return tc_readable_reg(dev, reg);
> +}
>
>  static const struct regmap_config tc_regmap_config =3D {
>         .name =3D "tc358767",
> @@ -2108,9 +2120,9 @@ static const struct regmap_config tc_regmap_config =
=3D {
>         .max_register =3D PLL_DBG,
>         .cache_type =3D REGCACHE_MAPLE,
>         .readable_reg =3D tc_readable_reg,
> +       .writeable_reg =3D tc_writeable_reg,
>         .volatile_table =3D &tc_volatile_table,
>         .precious_table =3D &tc_precious_table,
> -       .wr_table =3D &tc_writeable_table,
>         .reg_format_endian =3D REGMAP_ENDIAN_BIG,
>         .val_format_endian =3D REGMAP_ENDIAN_LITTLE,
>  };
> --
> 2.34.1
>


Reviewed-by: Robert Foss <rfoss@kernel.org>