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AJvYcCW9LnFL3CNDNWWAPnmXuMCZ+NsUYgq4tbPz1B0jZCT8Foq9n0v3Yi1nUkSfeHDkuwyU5AfL/imsmQC2RN0MtWv29SV6w2YgYcMrqTAz X-Gm-Message-State: AOJu0Yx1ek8/m93ttEZ8+q5ZDnGGZMDFo3TWeLDdTa3CHTFEiKsieFlH MtnGcqhcxCmwD+lu0droOKDV5FtVrmK0Oy1tStU7YHdrL+ZEc+r/pDjLz10KNDg= X-Received: by 2002:a05:651c:554:b0:2d7:1a30:e881 with SMTP id 38308e7fff4ca-2e95b0c2338mr115629481fa.12.1716994029945; Wed, 29 May 2024 07:47:09 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-2e98c45df0csm3791951fa.68.2024.05.29.07.47.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 May 2024 07:47:09 -0700 (PDT) From: Dmitry Baryshkov Date: Wed, 29 May 2024 17:47:07 +0300 Subject: [PATCH v2 09/14] ARM: dts: qcom: mdm9615: drop #power-domain-cells property of GCC Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20240529-qcom-gdscs-v2-9-69c63d0ae1e7@linaro.org> References: <20240529-qcom-gdscs-v2-0-69c63d0ae1e7@linaro.org> In-Reply-To: <20240529-qcom-gdscs-v2-0-69c63d0ae1e7@linaro.org> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Taniya Das , Robert Marko , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=813; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=HJLaCV8kZeQsHgpVRROJnMjh9Abjsmo5qtkKQDyGFFM=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmVz/lhJHnhkiyUTgo58PJib3j9FrnjcDsRw0gK FMocrWoojeJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZlc/5QAKCRCLPIo+Aiko 1Tw+CACySY0s7eo0HUEnEvAm6Z/5r9Q7AgJw4mHiTRxx2GamFY6GDsMN2/azZG01/W+BfXW4jCi wjm2yMMn2OAtRx5bzj8YO7QwL116DmGOCTsTajiiLhGJZRcDd+Qp5wMgjcO0ER/YuhFo5kZrmS2 hTLue3bt2kVL4gUAfXk8EHej6g1tlQN3mM6uY0bHc1wQnbMWG2sCb8j7tvKPMK9WjbNnhpNR/Rt 3FEfZJPEc4IcvcCGVAH1dNZs60PoNGySckuXuSJEs5CDqN0oo1jHnWhENz8idpYH+R8XWTMk/X2 QxpdCEMN230/Z0vK9M3NMeE+yQfu4JBmwAJ67r04w+jbcV+E X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A On MDM9615 the Global Clock Controller (GCC) doesn't provide power domains. Drop the #power-domain-cells property from the controller device node. Signed-off-by: Dmitry Baryshkov --- arch/arm/boot/dts/qcom/qcom-mdm9615.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom/qcom-mdm9615.dtsi b/arch/arm/boot/dts/qcom/qcom-mdm9615.dtsi index 34c60994d026..573feb3218c3 100644 --- a/arch/arm/boot/dts/qcom/qcom-mdm9615.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-mdm9615.dtsi @@ -102,7 +102,6 @@ msmgpio: pinctrl@800000 { gcc: clock-controller@900000 { compatible = "qcom,gcc-mdm9615"; #clock-cells = <1>; - #power-domain-cells = <1>; #reset-cells = <1>; reg = <0x900000 0x4000>; clocks = <&cxo_board>, -- 2.39.2