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AJvYcCUS7Itp20uMHk4PeY1Q9gFIPMj+FzxAovK4324r/kVPUeQ8D2H5UDFHBY6yZvnhIMiUDVXekvLxNf0ZqI2X7W+B4lXWaVUCbrgENpc2 X-Gm-Message-State: AOJu0Yz6ITQpFB5YEc+i6S19Vs9htSFen7RaAyhDE4DKG3jWt81hWsOK PQAf2AlilPoPIFRUONoW3YVEwhc/M8R9ehoHH9LA45Uru5sU/IW7krDZj4WWnC0= X-Received: by 2002:a05:651c:104f:b0:2e7:16c9:2e0c with SMTP id 38308e7fff4ca-2e95b097724mr135903141fa.15.1716994031651; Wed, 29 May 2024 07:47:11 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-2e98c45df0csm3791951fa.68.2024.05.29.07.47.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 May 2024 07:47:11 -0700 (PDT) From: Dmitry Baryshkov Date: Wed, 29 May 2024 17:47:09 +0300 Subject: [PATCH v2 11/14] arm64: dts: qcom: ipq5332: drop #power-domain-cells property of GCC Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20240529-qcom-gdscs-v2-11-69c63d0ae1e7@linaro.org> References: <20240529-qcom-gdscs-v2-0-69c63d0ae1e7@linaro.org> In-Reply-To: <20240529-qcom-gdscs-v2-0-69c63d0ae1e7@linaro.org> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Taniya Das , Robert Marko , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=766; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=PEHi7ElPElAQh4wpEEgIk9SSCUfmS0J4zLyn6bxTemU=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmVz/mRDt0AMJZqMVl/b8bAz7RVeHcmiPgq6uEl lPnCg6XBAOJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZlc/5gAKCRCLPIo+Aiko 1T5YCACco0POIcKCzu0sS/jEmLLULHh2w/LZ5e8eMvMidHYOre9vmjPu9VdpdFRUXuJDFV9oZLa NK17p9gny79n2SOkiEd+YBmQ6uyZBL8+4lx2SaS/GoRh0uy8o3TSchqHwNcFAmWD+VARfGZ+eEn kOr/Wtq4Onnu67cK1gFpATKSe+lmIi9T6u9LK2aCh+vSP9F9tOinJu6K13bmoDRMCgPemwsyzCE b7+GgpkavEJmXnlqWXabApuuSr06RfD8qGCvn2k25/39Wb7EW8jJ8b6xe5V5YpOmERsurbopWE7 oRwZmplnGMcjAqBweLwTz/tbJ1HHKXDbT+2Ssgvz7UKOxHQx X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A On IPQ5332 the Global Clock Controller (GCC) doesn't provide power domains. Drop the #power-domain-cells property from the controller device node. Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/ipq5332.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi index 770d9c2fb456..573656587c0d 100644 --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi @@ -208,7 +208,6 @@ gcc: clock-controller@1800000 { reg = <0x01800000 0x80000>; #clock-cells = <1>; #reset-cells = <1>; - #power-domain-cells = <1>; clocks = <&xo_board>, <&sleep_clk>, <0>, -- 2.39.2