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From: Mark Brown <broonie@kernel.org>
To: linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, 
 devicetree@vger.kernel.org, Witold Sadowski <wsadowski@marvell.com>
Cc: robh@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, 
 pthombar@cadence.com
In-Reply-To: <20240529074037.1345882-1-wsadowski@marvell.com>
References: <20240529074037.1345882-1-wsadowski@marvell.com>
Subject: Re: (subset) [PATCH v6 0/5] Marvell HW overlay support for Cadence
 xSPI
Message-Id: <171699540330.118008.2661040654002810758.b4-ty@kernel.org>
Date: Wed, 29 May 2024 16:10:03 +0100
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On Wed, 29 May 2024 00:40:31 -0700, Witold Sadowski wrote:
> This patch series adds support for the second version of the Marvell
> hardware overlay for the Cadence xSPI IP block. The overlay is a hardware
> change made around the original xSPI block. It extends xSPI features with
> clock configuration, interrupt masking, and full-duplex, variable-length SPI
> operations.
> 
> These functionalities allow the xSPI block to operate not only with memory
> devices but also with simple SPI devices and TPM devices.
> 
> [...]

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next

Thanks!

[1/5] spi: cadence: Ensure data lines set to low during dummy-cycle period
      commit: 4a69c1264ff41bc5bf7c03101ada0454fbf08868

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark