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Wed, 29 May 2024 15:15:37 +0000 (UTC) Date: Wed, 29 May 2024 17:15:31 +0200 From: Borislav Petkov To: Andrew Cooper , Nikolay Borisov Cc: "Kirill A. Shutemov" , Thomas Gleixner , Ingo Molnar , Dave Hansen , x86@kernel.org, "Rafael J. Wysocki" , Peter Zijlstra , Adrian Hunter , Kuppuswamy Sathyanarayanan , Elena Reshetova , Jun Nakajima , Rick Edgecombe , Tom Lendacky , "Kalra, Ashish" , Sean Christopherson , "Huang, Kai" , Ard Biesheuvel , Baoquan He , "H. Peter Anvin" , "K. Y. Srinivasan" , Haiyang Zhang , kexec@lists.infradead.org, linux-hyperv@vger.kernel.org, linux-acpi@vger.kernel.org, linux-coco@lists.linux.dev, linux-kernel@vger.kernel.org Subject: Re: [PATCHv11 05/19] x86/relocate_kernel: Use named labels for less confusion Message-ID: <20240529151531.GDZldGk5cBbyPrOBRP@fat_crate.local> References: <20240528095522.509667-1-kirill.shutemov@linux.intel.com> <20240528095522.509667-6-kirill.shutemov@linux.intel.com> <1e1d1aea-7346-4022-9f5f-402d171adfda@suse.com> <20240529112852.GBZlcRdI3oqBtjKxAV@fat_crate.local> <55bc0649-c017-49ab-905d-212f140a403f@citrix.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <55bc0649-c017-49ab-905d-212f140a403f@citrix.com> Content-Transfer-Encoding: quoted-printable On Wed, May 29, 2024 at 01:33:35PM +0100, Andrew Cooper wrote: > Seems I've gained a reputation... Yes you have. You have this weird interest in very deep uarch details that I can't share. Not at that detail. :-P > jmp 1f dates back to ye olde 8086, which started the whole trend of the > instruction pointer just being a figment of the ISA's imagination[1]. >=20 > Hardware maintains the pointer to the next byte to fetch (the prefetch > queue was up to 6 bytes), and there was a micro-op to subtract the > current length of the prefetch queue from the accumulator. >=20 > In those days, the prefetch queue was not coherent with main memory, an= d > jumps (being a discontinuity in the instruction stream) simply flushed > the prefetch queue. >=20 > This was necessary after modifying executable code, because otherwise > you could end up executing stale bytes from the prefetch queue and then > non-stale bytes thereafter.=C2=A0 (Otherwise known as the way to distin= guish > the 8086 from the 8088 because the latter only had a 4 byte prefetch qu= eue.) Thanks - that certainly wakes up a long-asleep neuron in the back of my mind... > Anyway.=C2=A0 It's how you used to spell "serialising operation" before= that > term ever entered the architecture.=C2=A0 Linux still supports CPUs pri= or to > the Pentium, so still needs to care about prefetch queues in the 486. >=20 > However, this example appears to be in 64bit code and following a write > to CR4 which will be fully serialising, so it's probably copy&paste fro= m > 32bit code where it would be necessary in principle. Yap, fully agreed. We could try to remove it and see what complains. Nikolay, wanna do a patch which properly explains the situation? > https://www.righto.com/2023/01/inside-8086-processors-instruction.html#= fn:pc >=20 > In fact, anyone who hasn't should read the entire series on the 8086, > https://www.righto.com/p/index.html Oh yeah, already bookmarked. Thanks Andy! --=20 Regards/Gruss, Boris. https://people.kernel.org/tglx/notes-about-netiquette