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Wed, 29 May 2024 17:28:16 +0000 (UTC) Date: Wed, 29 May 2024 19:28:09 +0200 From: Borislav Petkov To: Yazen Ghannam Cc: linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org, tony.luck@intel.com, x86@kernel.org, avadhut.naik@amd.com, john.allen@amd.com Subject: Re: [PATCH 3/3] x86/mce: Use mce_prep_record() helpers for apei_smca_report_x86_error() Message-ID: <20240529172809.GJZldlqSr5km0frQ_o@fat_crate.local> References: <20240521125434.1555845-1-yazen.ghannam@amd.com> <20240521125434.1555845-4-yazen.ghannam@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20240521125434.1555845-4-yazen.ghannam@amd.com> On Tue, May 21, 2024 at 07:54:34AM -0500, Yazen Ghannam wrote: > Current AMD systems can report MCA errors using the ACPI Boot Error > Record Table (BERT). The BERT entries for MCA errors will be an x86 > Common Platform Error Record (CPER) with an MSR register context that > matches the MCAX/SMCA register space. > > However, the BERT will not necessarily be processed on the CPU that > reported the MCA errors. Therefore, the correct CPU number needs to be > determined and the information saved in struct mce. > > The CPU number is determined by searching all possible CPUs for a Local > APIC ID matching the value in the x86 CPER. You're explaining the code again. :) > for_each_possible_cpu(cpu) { > - if (cpu_data(cpu).topo.initial_apicid == lapic_id) { > - m.extcpu = cpu; > - m.socketid = cpu_data(m.extcpu).topo.pkg_id; > + if (cpu_data(cpu).topo.initial_apicid == lapic_id) > break; > - } > } > > - m.apicid = lapic_id; > + if (!cpu_possible(cpu)) > + return -EINVAL; What's that test for? You just iterated over the possible CPUs using "cpu" as the iterator there... -- Regards/Gruss, Boris. https://people.kernel.org/tglx/notes-about-netiquette