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([2001:a61:35f9:9001:40df:88bb:5090:7ab6]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3557a08a88esm16397009f8f.41.2024.05.29.23.17.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 May 2024 23:17:48 -0700 (PDT) Message-ID: <3dc83aa5c1d138ef70dd64ba4154acb52b65a8a3.camel@gmail.com> Subject: Re: [PATCH v3 6/6] iio: adc: ad7173: Reduce device info struct size From: Nuno =?ISO-8859-1?Q?S=E1?= To: David Lechner , dumitru.ceclan@analog.com Cc: Lars-Peter Clausen , Michael Hennerich , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dumitru Ceclan Date: Thu, 30 May 2024 08:17:47 +0200 In-Reply-To: References: <20240527-ad4111-v3-0-7e9eddbbd3eb@analog.com> <20240527-ad4111-v3-6-7e9eddbbd3eb@analog.com> <2f26b72970be841279ca00c1b5eb91dcfffabdea.camel@gmail.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.52.1 (3.52.1-1.fc40) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Wed, 2024-05-29 at 15:32 -0500, David Lechner wrote: > On 5/29/24 7:23 AM, Nuno S=C3=A1 wrote: > > On Mon, 2024-05-27 at 20:02 +0300, Dumitru Ceclan via B4 Relay wrote: > > > From: Dumitru Ceclan > > >=20 > > > Reduce the size used by the device info struct by packing the bool > > > =C2=A0fields within the same byte. This reduces the struct size from = 52 bytes > > > =C2=A0to 44 bytes. > > >=20 > > > Signed-off-by: Dumitru Ceclan > > > --- > > > =C2=A0drivers/iio/adc/ad7173.c | 16 ++++++++-------- > > > =C2=A01 file changed, 8 insertions(+), 8 deletions(-) > > >=20 > > > diff --git a/drivers/iio/adc/ad7173.c b/drivers/iio/adc/ad7173.c > > > index 328685ce25e0..e8357a21d513 100644 > > > --- a/drivers/iio/adc/ad7173.c > > > +++ b/drivers/iio/adc/ad7173.c > > > @@ -179,15 +179,15 @@ struct ad7173_device_info { > > > =C2=A0 unsigned int clock; > > > =C2=A0 unsigned int id; > > > =C2=A0 char *name; > > > - bool has_current_inputs; > > > - bool has_vcom_input; > > > - bool has_temp; > > > + bool has_current_inputs :1; > > > + bool has_vcom_input :1; > > > + bool has_temp :1; > > > =C2=A0 /* ((AVDD1 =E2=88=92 AVSS)/5) */ > > > - bool has_common_input; > > > - bool has_input_buf; > > > - bool has_int_ref; > > > - bool has_ref2; > > > - bool higher_gpio_bits; > > > + bool has_common_input :1; > > > + bool has_input_buf :1; > > > + bool has_int_ref :1; > > > + bool has_ref2 :1; > > > + bool higher_gpio_bits :1; > > > =C2=A0 u8 num_gpios; > > > =C2=A0}; > > > =C2=A0 > > >=20 > >=20 > > This is really a very micro optimization... I would drop it tbh but no = strong > > feelings about it. > >=20 > > - Nuno S=C3=A1 >=20 > This only considers RAM size and not code size too. At least on ARM arch > every time we read or write to one of these fields, the code is now > implicitly `((field & 0x1) >> bits)` so two extra assembly instructions > for each read and write. This could be bigger than the size saved in > the structs. >=20 >=20 very good point... - Nuno S=C3=A1