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From: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
Date: Thu, 30 May 2024 10:58:59 +0100
Message-ID: <CA+V-a8s3J8PzmA9DqoazdAoC2WRdBASvWTr35FFzfKnJ7yWayA@mail.gmail.com>
Subject: Re: [PATCH 2/4] dt-bindings: clock: Add R9A09G057 CPG Clock and Reset Definitions
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, 
	Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>, Conor Dooley <conor+dt@kernel.org>, 
	Philipp Zabel <p.zabel@pengutronix.de>, Magnus Damm <magnus.damm@gmail.com>, 
	linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, 
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, 
	Fabrizio Castro <fabrizio.castro.jz@renesas.com>, 
	Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
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Hi Geert,

On Thu, May 30, 2024 at 8:12=E2=80=AFAM Geert Uytterhoeven <geert@linux-m68=
k.org> wrote:
>
> Hi Prabhakar,
>
> On Wed, May 29, 2024 at 11:10=E2=80=AFPM Lad, Prabhakar
> <prabhakar.csengg@gmail.com> wrote:
> > On Mon, May 27, 2024 at 10:18=E2=80=AFAM Geert Uytterhoeven
> > <geert@linux-m68k.org> wrote:
> > > On Fri, May 24, 2024 at 10:29=E2=80=AFAM Prabhakar <prabhakar.csengg@=
gmail.com> wrote:
> > > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > >
> > > > Define RZ/V2H(P) (R9A09G057) Clock Pulse Generator module clock out=
puts
> > > > (CPG_CLK_ON* registers), and reset definitions (CPG_RST_* registers=
)
> > > > in Section 4.4.2 and 4.4.3 ("List of Clock/Reset Signals") of the R=
Z/V2H(P)
> > > > Hardware User's Manual (Rev.1.01, Feb. 2024).
> > > >
> > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.c=
om>
> > >
> > > > --- /dev/null
> > > > +++ b/include/dt-bindings/clock/r9a09g057-cpg.h
> > > > @@ -0,0 +1,644 @@
> > > > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > > + *
> > > > + * Copyright (C) 2024 Renesas Electronics Corp.
> > > > + */
> > > > +#ifndef __DT_BINDINGS_CLOCK_R9A09G057_CPG_H__
> > > > +#define __DT_BINDINGS_CLOCK_R9A09G057_CPG_H__
> > > > +
> > > > +#include <dt-bindings/clock/renesas-cpg-mssr.h>
> > > > +
> > > > +/* Clock list */
> > >
> > > No distinction between Core and Module clocks?
> > >
> > I was in two minds here. Would you prefer clocks with no CGC support
> > to be listed as core clocks?
>
> What's CGC support? (Obviously I need some more reading before
> I can tackle the rest of this series :-)
>
I meant the clocks which cannot be controlled by the CPG_CLKON_m
register. Shall I add them as CORE clocks?

> My comments are due to the bindings saying:
>
>   '#clock-cells':
>     description: |
>       - For CPG core clocks, the two clock specifier cells must be "CPG_C=
ORE"
>         and a core clock reference, as defined in
>         <dt-bindings/clock/r9a09g057-cpg.h>,
>       - For module clocks, the two clock specifier cells must be "CPG_MOD=
" and
>         a module number, as defined in <dt-bindings/clock/r9a09g057-cpg.h=
>.
>     const: 2
>
> while the header file does not make it obvious whether a clock needs
> CPG_CORE or CPG_MOD.
>
I was intending to drop the CPG_CORE description in the next version.

Cheers,
Prabhakar