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[139.178.88.99]) by mx.google.com with ESMTPS id d9443c01a7336-1f6222953f5si8713025ad.129.2024.05.30.05.48.57 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 May 2024 05:48:57 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel+bounces-195387-linux.lists.archive=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) client-ip=139.178.88.99; Authentication-Results: mx.google.com; arc=pass (i=1 spf=pass spfdomain=arm.com dmarc=pass fromdomain=arm.com); spf=pass (google.com: domain of linux-kernel+bounces-195387-linux.lists.archive=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-195387-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id 0A94C28298A for ; Thu, 30 May 2024 12:48:57 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id EA73717F510; Thu, 30 May 2024 12:48:40 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 9DF8B17F4E0; Thu, 30 May 2024 12:48:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717073320; cv=none; b=Rus7Bsop/+rNaP40GfyTbEX8gkvzysANlcc/h+Y6bgWM+TQw2rpgCsYviGUuGKhMNfnEPgWDIeEgikPDQ5r7PmlqQiJGgU+ElSVDsFCpxHHm+Um06cFWjE62GBqXlKW22TN3EgDWpZc6ObhtIhm7P333mSA5sbjHAhYbtzCCToI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717073320; c=relaxed/simple; bh=0rQl/cKLRRzbfB91lX5MRST7yhxeLasHy+xqZ8/GUBg=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=WAIFhGOIHfkq7f/evysA1u7AUuE/lMVD4zA6BoR51oyGcgrLeYQXtUpcubppDeLnzjs/luKthxuCaJ4p21ZgUO27Cw/Fj7DQkcp3+JkvKkRu9NtQfKL/Lz0ggo7V2gMjM4KWvx+UyPPieOSBQMea6dSeoCMZw4Yk1CQhzfS62zw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E643B339; Thu, 30 May 2024 05:49:01 -0700 (PDT) Received: from [192.168.1.100] (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D93613F792; Thu, 30 May 2024 05:48:35 -0700 (PDT) Message-ID: Date: Thu, 30 May 2024 13:48:38 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1] perf evlist: Force adding default events only to core PMUs To: Namhyung Kim , Ian Rogers Cc: Arnaldo Carvalho de Melo , Leo Yan , Linus Torvalds , Peter Zijlstra , Ingo Molnar , Mark Rutland , Alexander Shishkin , Jiri Olsa , Adrian Hunter , Kan Liang , Dominique Martinet , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org References: <20240525152927.665498-1-irogers@google.com> <20240527105842.GB33806@debian-dev> Content-Language: en-US From: James Clark In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 30/05/2024 06:35, Namhyung Kim wrote: > On Wed, May 29, 2024 at 12:25 PM Ian Rogers wrote: >> We can fix the arm_dsu bug by renaming cycles there. If that's too >> hard to land, clearing up ambiguity by adding a PMU name has always >> been the way to do this. My preference for v6.10 is revert the revert, >> then add either a rename of the arm_dsu event and/or the change here. >> >> We can make perf record tolerant and ignore opening events on PMUs >> that don't support sampling, but I think it is too big a thing to do >> for v6.10. > > How about adding a flag to parse_event_option_args so that we > can check if it's for sampling events. And then we might skip > uncore PMUs easily (assuming arm_dsu PMU is uncore). It's uncore yes. Couldn't we theoretically have a core PMU that still doesn't support sampling though? And then we'd end up in the same situation. Attempting to open the event is the only sure way of knowing, rather than trying to guess with some heuristic in userspace? Maybe a bit too hypothetical but still worth considering. > > It might not be a perfect solution but it could be a simple one. > Ideally I think it'd be nice if the kernel exports more information > about the PMUs like sampling and exclude capabilities. > > Thanks, > Namhyung That seems like a much better suggestion. Especially with the ever expanding retry/fallback mechanism that can never really take into account every combination of event attributes that can fail. James