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bh=DR+biPGlYSGpZ+eEYjKOY4OeXDd2KnIrfa/0OCmMW9E=; b=NFkC4yABayuL0SL1hIBI8W1du+ T3MZqaBFNXMYIdsiFGnY4t4vN9zt4JV+Jc59ebpDaVe/2p6AYg24lNsQOe6P3bFtHhviXITU/3Jym h0bqtqnit8ThM/AaX/+wIdYRH4WABYTpkpAorGlNwwjhS5rZIbG8nOLkExJfN3TUTec98kaHV8Im/ uKOdSsStbBiLacIkvQklyxZSCcSuGdksCBKkmxNR/H5RwwFnWQY6TVIyOWoKkyaR7QRtf7XBScKTa Bb32PLsKgUVTsFxQlMR6OrkICUSsA2BHc1xFmTBlfrkDGAILcz1HtwnGkaWZQQlsWUG06eINLP69a E17EGdGw==; Received: from sslproxy07.your-server.de ([78.47.199.104]) by www530.your-server.de with esmtpsa (TLS1.3) tls TLS_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1sCh3B-000CAe-KS; Thu, 30 May 2024 16:46:41 +0200 Received: from [185.17.218.86] (helo=localhost) by sslproxy07.your-server.de with esmtpsa (TLS1.3) tls TLS_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1sCh3A-000N8Q-2m; Thu, 30 May 2024 16:46:40 +0200 From: Esben Haabendal Date: Thu, 30 May 2024 16:46:36 +0200 Subject: [PATCH v3 1/3] memory: fsl_ifc: Make FSL_IFC config visible and selectable Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20240530-fsl-ifc-config-v3-1-1fd2c3d233dd@geanix.com> References: <20240530-fsl-ifc-config-v3-0-1fd2c3d233dd@geanix.com> In-Reply-To: <20240530-fsl-ifc-config-v3-0-1fd2c3d233dd@geanix.com> To: Krzysztof Kozlowski , Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Michael Ellerman , Nicholas Piggin , Christophe Leroy , "Aneesh Kumar K.V" , "Naveen N. Rao" , Catalin Marinas , Will Deacon Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, Esben Haabendal X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1717080399; l=1542; i=esben@geanix.com; s=20240523; h=from:subject:message-id; bh=lSsBHROKQmgg5+ha1ztlFWTe4EVHhL1T/vXqe+WJJUE=; b=Rw8YFVh+YnzoP3xy0ZD/Bc+ulic0bj3eu4xdUcK3o3H1+HBhui0PwPmFajMBmrtRx9Eht24PV +fUCrwijTW9Cduj9aWfNCo5qv2Rc5g5IJfiSRFY0iLWhM9mmcc4Alna X-Developer-Key: i=esben@geanix.com; a=ed25519; pk=PbXoezm+CERhtgVeF/QAgXtEzSkDIahcWfC7RIXNdEk= X-Authenticated-Sender: esben@geanix.com X-Virus-Scanned: Clear (ClamAV 0.103.10/27291/Thu May 30 10:29:52 2024) While use of fsl_ifc driver with NAND flash is fine, as the fsl_ifc_nand driver selects FSL_IFC automatically, we need the CONFIG_FSL_IFC option to be selectable for platforms using fsl_ifc with NOR flash. Fixes: ea0c0ad6b6eb ("memory: Enable compile testing for most of the drivers") Reviewed-by: Miquel Raynal Signed-off-by: Esben Haabendal --- drivers/memory/Kconfig | 2 +- drivers/mtd/nand/raw/Kconfig | 3 +-- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig index 8efdd1f97139..c82d8d8a16ea 100644 --- a/drivers/memory/Kconfig +++ b/drivers/memory/Kconfig @@ -167,7 +167,7 @@ config FSL_CORENET_CF represents a coherency violation. config FSL_IFC - bool "Freescale IFC driver" if COMPILE_TEST + bool "Freescale IFC driver" depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A || COMPILE_TEST depends on HAS_IOMEM diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index cbf8ae85e1ae..614257308516 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -234,8 +234,7 @@ config MTD_NAND_FSL_IFC tristate "Freescale IFC NAND controller" depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A || COMPILE_TEST depends on HAS_IOMEM - select FSL_IFC - select MEMORY + depends on FSL_IFC help Various Freescale chips e.g P1010, include a NAND Flash machine with built-in hardware ECC capabilities. -- 2.45.1