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([2a10:bac0:b000:5de0:a23:f1c3:862a:5eac]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a626cc4f969sm827690066b.101.2024.05.30.08.26.20 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 30 May 2024 08:26:21 -0700 (PDT) Message-ID: Date: Thu, 30 May 2024 18:26:19 +0300 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] x86: Remove the prefetch() specific implementation on x86_64 To: Youling Tang , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen Cc: x86@kernel.org, linux-kernel@vger.kernel.org, Mateusz Guzik , Youling Tang References: <20240529032059.899347-1-youling.tang@linux.dev> From: Nikolay Borisov Content-Language: en-US In-Reply-To: <20240529032059.899347-1-youling.tang@linux.dev> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 29.05.24 г. 6:20 ч., Youling Tang wrote: > From: Youling Tang > > After commit ab483570a13b ("x86 & generic: change to __builtin_prefetch()"), > x86_64 directly uses __builtin_prefetch() without the specific implementation > of prefetch(). Also, x86_64 use a generic definition until commit ae2e15eb3b6c > ("x86: unify prefetch operations"). So remove it. So this patch just ensures the x86-specific prefetch() implementation is defined only for 32bit case, otherwise we have it defined for the 64bit case as well but effectively it's not used since ARCH_HAS_PREFETCH is not defined for 64bit, meaning in the 64bit case prefetch() is still defined to __builtint_prefetch in include/linux/prefetch.h. In essence this is a purely cosmetic cleanup , am I right? I compiled a file that utilizes prefetch with and without your patch and the generated assembly is identical. Reviewed-by: Nikolay Borisov > > Signed-off-by: Youling Tang > --- > arch/x86/include/asm/processor.h | 7 ++++--- > 1 file changed, 4 insertions(+), 3 deletions(-) > > diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h > index cb4f6c513c48..44371bdcc59d 100644 > --- a/arch/x86/include/asm/processor.h > +++ b/arch/x86/include/asm/processor.h > @@ -599,9 +599,6 @@ extern char ignore_fpu_irq; > #ifdef CONFIG_X86_32 > # define BASE_PREFETCH "" > # define ARCH_HAS_PREFETCH > -#else > -# define BASE_PREFETCH "prefetcht0 %1" > -#endif > > /* > * Prefetch instructions for Pentium III (+) and AMD Athlon (+) > @@ -616,6 +613,10 @@ static inline void prefetch(const void *x) > "m" (*(const char *)x)); > } > > +#else > +# define BASE_PREFETCH "prefetcht0 %1" > +#endif > + > /* > * 3dnow prefetch to get an exclusive cache line. > * Useful for spinlocks to avoid one state transition in the