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mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; Received: from SJ2PR11MB7573.namprd11.prod.outlook.com (2603:10b6:a03:4d2::10) by IA1PR11MB7317.namprd11.prod.outlook.com (2603:10b6:208:427::6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7633.21; Thu, 30 May 2024 20:27:34 +0000 Received: from SJ2PR11MB7573.namprd11.prod.outlook.com ([fe80::61a:aa57:1d81:a9cf]) by SJ2PR11MB7573.namprd11.prod.outlook.com ([fe80::61a:aa57:1d81:a9cf%3]) with mapi id 15.20.7633.017; Thu, 30 May 2024 20:27:34 +0000 Message-ID: <66468aa6-e0a2-4c41-99b1-741f574c5fc1@intel.com> Date: Thu, 30 May 2024 13:27:31 -0700 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v19 18/20] x86/resctrl: Enable RMID shared RMID mode on Sub-NUMA Cluster (SNC) systems To: Tony Luck , Fenghua Yu , Maciej Wieczor-Retman , Peter Newman , James Morse , Babu Moger , Drew Fustini , Dave Martin CC: , , References: <20240528222006.58283-1-tony.luck@intel.com> <20240528222006.58283-19-tony.luck@intel.com> Content-Language: en-US From: Reinette Chatre In-Reply-To: <20240528222006.58283-19-tony.luck@intel.com> Content-Type: text/plain; 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When SNC is enabled bit 0 of this MSR must be cleared. Missing explanation why bit 0 of this MSR must be cleared. > > Add an architecture specific hook into domain_add_cpu_mon() to call > a function to set the MSR. Can this explain more than what the code already tells us? > > Signed-off-by: Tony Luck > --- > arch/x86/include/asm/msr-index.h | 1 + > arch/x86/kernel/cpu/resctrl/internal.h | 2 ++ > arch/x86/kernel/cpu/resctrl/core.c | 2 ++ > arch/x86/kernel/cpu/resctrl/monitor.c | 26 ++++++++++++++++++++++++++ > 4 files changed, 31 insertions(+) > > diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h > index e022e6eb766c..3cb8dd6311c3 100644 > --- a/arch/x86/include/asm/msr-index.h > +++ b/arch/x86/include/asm/msr-index.h > @@ -1164,6 +1164,7 @@ > #define MSR_IA32_QM_CTR 0xc8e > #define MSR_IA32_PQR_ASSOC 0xc8f > #define MSR_IA32_L3_CBM_BASE 0xc90 > +#define MSR_RMID_SNC_CONFIG 0xca0 > #define MSR_IA32_L2_CBM_BASE 0xd10 > #define MSR_IA32_MBA_THRTL_BASE 0xd50 > > diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/resctrl/internal.h > index 7957fc38b71c..08520321f5d0 100644 > --- a/arch/x86/kernel/cpu/resctrl/internal.h > +++ b/arch/x86/kernel/cpu/resctrl/internal.h > @@ -532,6 +532,8 @@ static inline bool resctrl_arch_get_cdp_enabled(enum resctrl_res_level l) > > int resctrl_arch_set_cdp_enabled(enum resctrl_res_level l, bool enable); > > +void arch_mon_domain_online(struct rdt_resource *r, struct rdt_mon_domain *d); I expect that this function will be called from the already architecture specific code so needing an architecture specific hook as the changelog mentions does not seem appropriate. Reinette