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Subject: Re: [PATCH] Documentation: RISC-V: uabi: Only scalar misaligned loads are
 supported
From: patchwork-bot+linux-riscv@kernel.org
Message-Id: 
 <171710343056.6624.2242126513528878113.git-patchwork-notify@kernel.org>
Date: Thu, 30 May 2024 21:10:30 +0000
References: <20240524185600.5919-1-palmer@rivosinc.com>
In-Reply-To: <20240524185600.5919-1-palmer@rivosinc.com>
To: Palmer Dabbelt <palmer@rivosinc.com>
Cc: linux-riscv@lists.infradead.org, corbet@lwn.net, paul.walmsley@sifive.com,
 palmer@dabbelt.com, aou@eecs.berkeley.edu, costa.shul@redhat.com,
 conor.dooley@microchip.com, linux-doc@vger.kernel.org,
 linux-kernel@vger.kernel.org

Hello:

This patch was applied to riscv/linux.git (fixes)
by Palmer Dabbelt <palmer@rivosinc.com>:

On Fri, 24 May 2024 11:56:00 -0700 you wrote:
> From: Palmer Dabbelt <palmer@rivosinc.com>
> 
> We're stuck supporting scalar misaligned loads in userspace because they
> were part of the ISA at the time we froze the uABI.  That wasn't the
> case for vector misaligned accesses, so depending on them
> unconditionally is a userspace bug.  All extant vector hardware traps on
> these misaligned accesses.
> 
> [...]

Here is the summary with links:
  - Documentation: RISC-V: uabi: Only scalar misaligned loads are supported
    https://git.kernel.org/riscv/c/982a7eb97be6

You are awesome, thank you!
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