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AJvYcCWCzsuzyPNB7szduIfnXRsY/cR+4Talj+ru7WO/ASYkiK+6yYhzygTQ5mLN84MRU1FFkQTEjkfrypdCaMNSuUDRhrczDG2e6cRGF31c X-Gm-Message-State: AOJu0YwMTipMFqiannoKDhd6aWEtwWfduayjs27B1AQrPDSbLHasJmc4 CVtSSxv6euGK5x2A8r5fvxrS3gtiosJL4bHssgmo9NPdyF8SjzJDjYWJoRKhAE0= X-Received: by 2002:a17:90a:c914:b0:2c1:b66c:d414 with SMTP id 98e67ed59e1d1-2c1b66cd54dmr2280707a91.36.1717103591073; Thu, 30 May 2024 14:13:11 -0700 (PDT) Received: from localhost ([50.145.13.30]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2c1c27e3a5asm210516a91.30.2024.05.30.14.13.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 May 2024 14:13:10 -0700 (PDT) Date: Thu, 30 May 2024 14:13:10 -0700 (PDT) X-Google-Original-Date: Thu, 30 May 2024 14:13:08 PDT (-0700) Subject: Re: [PATCH v5 08/16] riscv: add ISA parsing for Zca, Zcf, Zcd and Zcb In-Reply-To: CC: Conor Dooley , corbet@lwn.net, Paul Walmsley , aou@eecs.berkeley.edu, robh@kernel.org, krzysztof.kozlowski+dt@linaro.org, anup@brainfault.org, shuah@kernel.org, atishp@atishpatra.org, linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org From: Palmer Dabbelt To: cleger@rivosinc.com Message-ID: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 (MHng) Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit On Wed, 22 May 2024 00:20:09 PDT (-0700), cleger@rivosinc.com wrote: > > > On 21/05/2024 21:49, Conor Dooley wrote: >> On Fri, May 17, 2024 at 04:52:48PM +0200, Clément Léger wrote: >> >>> +static int riscv_ext_zca_depends(const struct riscv_isa_ext_data *data, >>> + const unsigned long *isa_bitmap) >>> +{ >>> + return __riscv_isa_extension_available(isa_bitmap, RISCV_ISA_EXT_ZCA) ? 0 : -EPROBE_DEFER; >>> +} >>> +static int riscv_ext_zcd_validate(const struct riscv_isa_ext_data *data, >>> + const unsigned long *isa_bitmap) >>> +{ >>> + return __riscv_isa_extension_available(isa_bitmap, RISCV_ISA_EXT_ZCA) && >>> + __riscv_isa_extension_available(isa_bitmap, RISCV_ISA_EXT_d) ? 0 : -EPROBE_DEFER; >>> +} >> >> Could you write the logic in these out normally please? I think they'd >> be more understandable (particular this second one) broken down and with >> early return. > > Yes sure. I'll probably make the same thing for zcf_validate as well as > removing the #ifdef and using IS_ENABLED(): > > static int riscv_ext_zcf_validate(const struct riscv_isa_ext_data *data, > const unsigned long *isa_bitmap) > { > if (IS_ENABLED(CONFIG_64BIT)) > return -EINVAL; > > if (__riscv_isa_extension_available(isa_bitmap, RISCV_ISA_EXT_ZCA) && > __riscv_isa_extension_available(isa_bitmap, RISCV_ISA_EXT_f)) > return 0; > > return -EPROBE_DEFER; > } Are you going to send a v6 (sorry if I missed it, I'm trying to untangle all these ISA parsing patch sets). > >> >> Otherwise, >> Reviewed-by: Conor Dooley >> >> Cheers, >> Conor.