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[2001:14ba:a0c3:3a00::227]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-2ea91bed98csm1206671fa.70.2024.05.30.16.56.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 May 2024 16:56:13 -0700 (PDT) Date: Fri, 31 May 2024 02:56:12 +0300 From: Dmitry Baryshkov To: Abel Vesa Cc: Bjorn Andersson , Michael Turquette , Stephen Boyd , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] clk: qcom: gcc-x1e80100: Set parent rate for USB3 sec and tert PHY pipe clks Message-ID: <3ukguewuqqm5gmbd3afl62ihysdzkk44j3f2nuqht4gjuf5ruo@zu7jmmnbrpdj> References: <20240530-x1e80100-clk-gcc-usb3-sec-tert-set-parent-rate-v1-1-7b2b04cad545@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240530-x1e80100-clk-gcc-usb3-sec-tert-set-parent-rate-v1-1-7b2b04cad545@linaro.org> On Thu, May 30, 2024 at 05:05:24PM +0300, Abel Vesa wrote: > Allow the USB3 second and third GCC PHY pipe clocks to propagate the > rate to the pipe clocks provided by the QMP combo PHYs. The first > instance is already doing that. Which driver changes the rate of those clocks? > > Fixes: ("161b7c401f4b clk: qcom: Add Global Clock controller (GCC) driver for X1E80100") > Signed-off-by: Abel Vesa > --- > drivers/clk/qcom/gcc-x1e80100.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/clk/qcom/gcc-x1e80100.c b/drivers/clk/qcom/gcc-x1e80100.c > index 1404017be918..8c72fdc99fd9 100644 > --- a/drivers/clk/qcom/gcc-x1e80100.c > +++ b/drivers/clk/qcom/gcc-x1e80100.c > @@ -5269,6 +5269,7 @@ static struct clk_branch gcc_usb3_sec_phy_pipe_clk = { > &gcc_usb3_sec_phy_pipe_clk_src.clkr.hw, > }, > .num_parents = 1, > + .flags = CLK_SET_RATE_PARENT, > .ops = &clk_branch2_ops, > }, > }, > @@ -5339,6 +5340,7 @@ static struct clk_branch gcc_usb3_tert_phy_pipe_clk = { > &gcc_usb3_tert_phy_pipe_clk_src.clkr.hw, > }, > .num_parents = 1, > + .flags = CLK_SET_RATE_PARENT, > .ops = &clk_branch2_ops, > }, > }, > > --- > base-commit: 9d99040b1bc8dbf385a8aa535e9efcdf94466e19 > change-id: 20240530-x1e80100-clk-gcc-usb3-sec-tert-set-parent-rate-420a9e2113d1 > > Best regards, > -- > Abel Vesa > -- With best wishes Dmitry