Received: by 2002:a05:6500:2018:b0:1fb:9675:f89d with SMTP id t24csp143353lqh; Thu, 30 May 2024 17:36:02 -0700 (PDT) X-Forwarded-Encrypted: i=3; AJvYcCXJZYYIOjODHLDjFTC6UrD70x9lmhiX4ItXJLVN2lsmq50itB82pN8QUzgVuyJhyN3rHI4fPimbYucX76glyRgTaWZ8MD0psVc2aQMUJw== X-Google-Smtp-Source: AGHT+IHMe0YXDQSXJT/iPsJfwcy1u0X1d8gMc6b/Cc5WJirBAtF6GzIzlWwmyGjMK5w92gcHtxT5 X-Received: by 2002:a5d:4003:0:b0:354:e4df:472f with SMTP id ffacd0b85a97d-35e0f272b5dmr157540f8f.25.1717115762048; Thu, 30 May 2024 17:36:02 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1717115762; cv=pass; d=google.com; s=arc-20160816; b=Eeud2kb6JvvQ6SVKnofERXJbZUQ74ff0+cTzN4W9hIQYzufGzpKwNZU2tXEQZEWVGb dEy24W3TWAMorpon3ZptrKenImNVFxyYiDcBdlcRE/qRioPCbsJDe4JwY16PiuTLgai0 LjB00oB+pqdPXebApb/xwyfz8pM2YRrArhlatUyLc3SIv3MxnUkGJyMGiRdHYGmC+PWb H3gv28eTxM6aX/QqGfpq+nKzFRGd1dkTwJp6tQU2WT7J1Kcqf/U6bVmSgwmdsOLLE4PA cbPTiFBLLQi/9iow2MSLmao8r3UcVzj4PEu1rsXn4fOpMNaT58Ed+V8t6LaJKcGcYBgW 8fEw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=in-reply-to:content-disposition:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:reply-to:message-id :subject:cc:to:from:date:dkim-signature; bh=/OsiOHJM7vYoLf/dMQpp24tIL0CZBaEcftsHM+NEo00=; fh=56QjMPTUipCbHWtiEIJrxvPZ6mRr4PwGaeCNh65HYNE=; b=iWUyJsMbpdhNsmPw//YsxYbA4q/8mpkdQyfOVZfuU0Ewbx+abTT06KubUCw49tcTzl neGlOTfkI5mt8T5TF4X6aCpQsKJUwDquHardnSIY2FXZkLXiGjX9Gu/J/FFegsxgw++K UzL7peECLZItm4t5c/oXTe1TCmDy65mUu5aSky8pDWac211CdraVSEeNGE0JzuVFLZuq Cu3AzvJuqljC+9+81oq7j6lvItLE3h8Qc948tLFRreNLHn8wzZzCQ9q+eSVP8wtnAw/3 8VVRqOmOLmeNqb6eJ8wlzc0BNLJ9KEWMqDZ9+lg7Nqveu74rinFqg8qd1voI5KdW3EGU AD9Q==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b="Vjv6cAn/"; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-196083-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-kernel+bounces-196083-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. [2604:1380:4601:e00::3]) by mx.google.com with ESMTPS id a640c23a62f3a-a67ea38db46si29894966b.444.2024.05.30.17.36.01 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 May 2024 17:36:02 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel+bounces-196083-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) client-ip=2604:1380:4601:e00::3; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b="Vjv6cAn/"; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-196083-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-kernel+bounces-196083-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id 9558E1F243B1 for ; Fri, 31 May 2024 00:36:01 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 68B00A95E; Fri, 31 May 2024 00:35:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Vjv6cAn/" Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7925D4C98; Fri, 31 May 2024 00:35:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717115745; cv=none; b=p//1caKdNFbpXpuvExUr9ZBkr1m2g0nL6gjJu2urLo8mlsWEk47LhHm4zDx6pllv80+MvqRp5HE2xUaQasdhEWZy0MrlrHotp9uZhciofIwDyPG/DQ10HY76lTE89H/qjsNWnu2bheGW2SwawrZxFN3Xrp9wVSjLiUzJG/PMiEA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717115745; c=relaxed/simple; bh=Gy/JnciJhe5Dw470c+ZEo/a9cuF+y5OZIqMUQ5HDt9E=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=IdFDKuUc+vk6B2kI9KGs/QYWhK+dBk4fVWkpeGHEDy0YdGrYMn1aAOdOmXU9M/xrEs8twk4e8a7uBM0S4u0cHX3j0TYRQbI8GJoZdCsB+XEFK5zD6skaIfN0xJ6n29YMEbgOdicXTJhzfXgimENR/STujDAtPb371C8K59Bj5kI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Vjv6cAn/; arc=none smtp.client-ip=10.30.226.201 Received: by smtp.kernel.org (Postfix) with ESMTPSA id F2261C2BBFC; Fri, 31 May 2024 00:35:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1717115745; bh=Gy/JnciJhe5Dw470c+ZEo/a9cuF+y5OZIqMUQ5HDt9E=; h=Date:From:To:Cc:Subject:Reply-To:References:In-Reply-To:From; b=Vjv6cAn/+8UwW97eP2xNnGyEgnK46LMImrvY3alPlMe6zJB3YqyfMbRnz6ZUh0QTH MFbPrdPpamwGfCBmghdDDBya3ZV5RloAI59bf61J1jr5pdJRmuAVtJJCk8lxJMjh3U TosgA4htaHDx1Nxp9IXkdLn5KeYshOTz/H45ZcufQ7v8rsuKjtm2F/kp1mK/lXB3C5 JeC9DLO0iDeaHHDxvDFobXBa2Q3pWZ6BUdUStHQcgtdWPNlepQCfsx2hBuYTejITBp YztEeDXYPGW3jjqQfVBhHC1sXlSq7D1dO2GouwAXxYZFCfxn4TJCenCbUgYXekdatd V5N4tDacITCQg== Received: by paulmck-ThinkPad-P17-Gen-1.home (Postfix, from userid 1000) id 548E7CE0B6F; Thu, 30 May 2024 17:35:44 -0700 (PDT) Date: Thu, 30 May 2024 17:35:44 -0700 From: "Paul E. McKenney" To: Nathan Chancellor Cc: Arnd Bergmann , Russell King , Naresh Kamboju , open list , Linux ARM , lkft-triage@lists.linaro.org, Linux Regressions , rcu , Dan Carpenter , Joel Fernandes , neeraj.upadhyay@kernel.org, John Ogness , broonie@kernel.org Subject: Re: arm-linux-gnueabihf-ld: kernel/rcu/update.o:update.c:(.text+0x1cc4): more undefined references to `__bad_cmpxchg' follow Message-ID: <3ce74da3-0b21-439b-af72-e80bfe0e9f02@paulmck-laptop> Reply-To: paulmck@kernel.org References: <7f61cc11-7afe-46ac-9f07-62e0b9ab429f@app.fastmail.com> <5426b25f-9c25-4938-99e8-5cdea75e4d3b@paulmck-laptop> <214a33ac-d4fa-4d48-ad3c-ad8b00ae1a5e@paulmck-laptop> <20240530215153.GA466604@thelio-3990X> <583e2476-50c5-4f9c-85af-f4489a53083b@paulmck-laptop> <20240530233053.GA1601862@thelio-3990X> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240530233053.GA1601862@thelio-3990X> On Thu, May 30, 2024 at 04:30:53PM -0700, Nathan Chancellor wrote: > On Thu, May 30, 2024 at 03:05:21PM -0700, Paul E. McKenney wrote: > > On Thu, May 30, 2024 at 02:52:48PM -0700, Nathan Chancellor wrote: > > > On Thu, May 30, 2024 at 10:24:05AM -0700, Paul E. McKenney wrote: > > > > And for an untested first attempt at a fix. > > > > > > > > What did I mess up this time? ;-) > > > > > > An include for cmpxchg-emu.h ;) > > > > > > In file included from arch/arm/include/asm/atomic.h:16, > > > from include/linux/atomic.h:7, > > > from include/asm-generic/bitops/lock.h:5, > > > from arch/arm/include/asm/bitops.h:245, > > > from include/linux/bitops.h:63, > > > from include/linux/log2.h:12, > > > from kernel/bounds.c:13: > > > arch/arm/include/asm/cmpxchg.h: In function '__cmpxchg': > > > arch/arm/include/asm/cmpxchg.h:167:26: error: implicit declaration of function 'cmpxchg_emu_u8' [-Werror=implicit-function-declaration] > > > 167 | oldval = cmpxchg_emu_u8((volatile u8 *)ptr, old, new); > > > | ^~~~~~~~~~~~~~ > > > cc1: some warnings being treated as errors > > > > Good catch, and thank you for testing this! Does the updated version > > shown below do better? > > Yes, that matches what I tested locally before I replied initially. Very good! May I please add your Tested-by? Thanx, Paul > Thanks for the quick fix! > > Cheers, > Nathan > > > Thanx, Paul > > > > ------------------------------------------------------------------------ > > > > commit 74e3470afacaa9d2f37db4773a5fef887ac4ef56 > > Author: Paul E. McKenney > > Date: Thu May 30 10:11:31 2024 -0700 > > > > ARM: Emulate one-byte cmpxchg > > > > Use the new cmpxchg_emu_u8() to emulate one-byte cmpxchg() on ARM systems > > with ARCH < ARMv6K. > > > > [ paulmck: Apply Arnd Bergmann and Nathan Chancellor feedback. ] > > > > Reported-by: Mark Brown > > Closes: https://lore.kernel.org/all/54798f68-48f7-4c65-9cba-47c0bf175143@sirena.org.uk/ > > Reported-by: Naresh Kamboju > > Closes: https://lore.kernel.org/all/CA+G9fYuZ+pf6p8AXMZWtdFtX-gbG8HMaBKp=XbxcdzA_QeLkxQ@mail.gmail.com/ > > Signed-off-by: Paul E. McKenney > > Cc: "Russell King (Oracle)" > > Cc: Arnd Bergmann > > Cc: Andrew Davis > > Cc: Andrew Morton > > Cc: Linus Walleij > > Cc: Eric DeVolder > > Cc: Rob Herring > > Cc: > > > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig > > index ee5115252aac4..a867a7d967aa5 100644 > > --- a/arch/arm/Kconfig > > +++ b/arch/arm/Kconfig > > @@ -34,6 +34,7 @@ config ARM > > select ARCH_MIGHT_HAVE_PC_PARPORT > > select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX > > select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT if CPU_V7 > > + select ARCH_NEED_CMPXCHG_1_EMU if CPU_V6 > > select ARCH_SUPPORTS_ATOMIC_RMW > > select ARCH_SUPPORTS_CFI_CLANG > > select ARCH_SUPPORTS_HUGETLBFS if ARM_LPAE > > diff --git a/arch/arm/include/asm/cmpxchg.h b/arch/arm/include/asm/cmpxchg.h > > index 44667bdb4707a..a428e06fe94ee 100644 > > --- a/arch/arm/include/asm/cmpxchg.h > > +++ b/arch/arm/include/asm/cmpxchg.h > > @@ -5,6 +5,7 @@ > > #include > > #include > > #include > > +#include > > > > #if defined(CONFIG_CPU_SA1100) || defined(CONFIG_CPU_SA110) > > /* > > @@ -162,7 +163,11 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old, > > prefetchw((const void *)ptr); > > > > switch (size) { > > -#ifndef CONFIG_CPU_V6 /* min ARCH >= ARMv6K */ > > +#ifdef CONFIG_CPU_V6 /* min ARCH < ARMv6K */ > > + case 1: > > + oldval = cmpxchg_emu_u8((volatile u8 *)ptr, old, new); > > + break; > > +#else /* min ARCH >= ARMv6K */ > > case 1: > > do { > > asm volatile("@ __cmpxchg1\n"