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From: Alexander Stein <alexander.stein@ew.tq-group.com>
To: robh@kernel.org, Frank Li <Frank.Li@nxp.com>
Cc: Frank.Li@nxp.com, brgl@bgdev.pl, conor+dt@kernel.org, devicetree@vger.kernel.org, imx@lists.linux.dev, krzk+dt@kernel.org, linus.walleij@linaro.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 1/1] dt-bindings: gpio: mpc8xxx: Convert to yaml format
Date: Fri, 31 May 2024 08:16:44 +0200
Message-ID: <2408577.ElGaqSPkdT@steina-w>
Organization: TQ-Systems GmbH
In-Reply-To: <20240530165424.3173673-1-Frank.Li@nxp.com>
References: <20240530165424.3173673-1-Frank.Li@nxp.com>
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Hi Frank,

thanks for your patch.

Am Donnerstag, 30. Mai 2024, 18:54:24 CEST schrieb Frank Li:
> Convert binding doc from txt to yaml.
>=20
> Remove redundated "gpio1: gpio@2300000" example.
> Add gpio-controller at example "gpio@1100".
>=20
> Signed-off-by: Frank Li <Frank.Li@nxp.com>
> ---
>=20
> Notes:
>     Change from v1 to v2
>      - Add gpio-controller at example "gpio@1100". to fix bot error.
>     Strangely, I can't reproduce locally.
>    =20
>     Pass dt_binding_check
>     make dt_binding_check DT_SCHEMA_FILES=3Dfsl,qoriq-gpio.yaml
>       SCHEMA  Documentation/devicetree/bindings/processed-schema.json
>       CHKDT   Documentation/devicetree/bindings
>       LINT    Documentation/devicetree/bindings
>       DTC_CHK Documentation/devicetree/bindings/gpio/fsl,qoriq-gpio.examp=
le.dtb
>=20
>  .../bindings/gpio/fsl,qoriq-gpio.yaml         | 82 +++++++++++++++++++
>  .../devicetree/bindings/gpio/gpio-mpc8xxx.txt | 53 ------------
>  2 files changed, 82 insertions(+), 53 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/gpio/fsl,qoriq-gpio=
=2Eyaml
>  delete mode 100644 Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.t=
xt
>=20
> diff --git a/Documentation/devicetree/bindings/gpio/fsl,qoriq-gpio.yaml b=
/Documentation/devicetree/bindings/gpio/fsl,qoriq-gpio.yaml
> new file mode 100644
> index 0000000000000..adc955679d066
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/gpio/fsl,qoriq-gpio.yaml
> @@ -0,0 +1,82 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/gpio/fsl,qoriq-gpio.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale MPC512x/MPC8xxx/QorIQ/Layerscape GPIO controller
> +
> +maintainers:
> +  - Frank Li <Frank.Li@nxp.com>
> +
> +properties:
> +  compatible:
> +    oneOf:
> +      - enum:
> +          - fsl,mpc5121-gpio
> +          - fsl,mpc5125-gpio
> +          - fsl,mpc8349-gpio
> +          - fsl,mpc8572-gpio
> +          - fsl,mpc8610-gpio
> +          - fsl,pq3-gpio
> +      - items:
> +          - enum:
> +              - fsl,ls1021a-gpio
> +              - fsl,ls1028a-gpio
> +              - fsl,ls1043a-gpio
> +              - fsl,ls1088a-gpio
> +              - fsl,ls2080a-gpio
> +          - const: fsl,qoriq-gpio
> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupts:
> +    maxItems: 1
> +
> +  "#gpio-cells":
> +    const: 2
> +
> +  gpio-controller: true
> +
> +  interrupt-controller: true
> +
> +  "#interrupt-cells":
> +    const: 2
> +
> +  little-endian:
> +    $ref: /schemas/types.yaml#/definitions/flag
> +    description:
> +      GPIO registers are used as little endian. If not
> +      present registers are used as big endian by default.
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +  - "#gpio-cells"
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    gpio@1100 {
> +        compatible =3D "fsl,mpc5125-gpio";
> +        reg =3D <0x1100 0x080>;
> +        interrupts =3D <78 0x8>;
> +        gpio-controller;
> +        #gpio-cells =3D <2>;
> +    };
> +
> +  - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    gpio@2300000 {
> +        compatible =3D "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
> +        reg =3D <0x2300000 0x10000>;
> +        interrupts =3D <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
> +        gpio-controller;
> +        little-endian;
> +        #gpio-cells =3D <2>;

Please keep 'gpio-controller' and '#gpio-cells' together. I would move
little-endian either below reg directly or below interrupts.

Thanks
Alexander

> +        interrupt-controller;
> +        #interrupt-cells =3D <2>;
> +    };
> diff --git a/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt b/Do=
cumentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
> deleted file mode 100644
> index cd28e932bf50e..0000000000000
> --- a/Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
> +++ /dev/null
> @@ -1,53 +0,0 @@
> -* Freescale MPC512x/MPC8xxx/QorIQ/Layerscape GPIO controller
> -
> -Required properties:
> -- compatible : Should be "fsl,<soc>-gpio"
> -  The following <soc>s are known to be supported:
> -	mpc5121, mpc5125, mpc8349, mpc8572, mpc8610, pq3, qoriq,
> -	ls1021a, ls1043a, ls2080a, ls1028a, ls1088a.
> -- reg : Address and length of the register set for the device
> -- interrupts : Should be the port interrupt shared by all 32 pins.
> -- #gpio-cells : Should be two.  The first cell is the pin number and
> -  the second cell is used to specify the gpio polarity:
> -      0 =3D active high
> -      1 =3D active low
> -
> -Optional properties:
> -- little-endian : GPIO registers are used as little endian. If not
> -                  present registers are used as big endian by default.
> -
> -Example of gpio-controller node for a mpc5125 SoC:
> -
> -gpio0: gpio@1100 {
> -	compatible =3D "fsl,mpc5125-gpio";
> -	#gpio-cells =3D <2>;
> -	reg =3D <0x1100 0x080>;
> -	interrupts =3D <78 0x8>;
> -};
> -
> -Example of gpio-controller node for a ls2080a SoC:
> -
> -gpio0: gpio@2300000 {
> -	compatible =3D "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
> -	reg =3D <0x0 0x2300000 0x0 0x10000>;
> -	interrupts =3D <0 36 0x4>; /* Level high type */
> -	gpio-controller;
> -	little-endian;
> -	#gpio-cells =3D <2>;
> -	interrupt-controller;
> -	#interrupt-cells =3D <2>;
> -};
> -
> -
> -Example of gpio-controller node for a ls1028a/ls1088a SoC:
> -
> -gpio1: gpio@2300000 {
> -	compatible =3D "fsl,ls1028a-gpio", "fsl,ls1088a-gpio", "fsl,qoriq-gpio";
> -	reg =3D <0x0 0x2300000 0x0 0x10000>;
> -	interrupts =3D <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
> -	gpio-controller;
> -	#gpio-cells =3D <2>;
> -	interrupt-controller;
> -	#interrupt-cells =3D <2>;
> -	little-endian;
> -};
>=20


=2D-=20
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