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Fri, 31 May 2024 08:13:09 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id E5C3981211; Fri, 31 May 2024 08:12:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="IP+L4ndD" Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 04BEC7D071; Fri, 31 May 2024 08:12:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717143161; cv=none; b=GSPTP3cxd3jf9AEE4iROmz/F4BNF4gMpm5pLutgn8zaGMfE2sxqXXaAgmJJB4Pj92tHlm28RDtLuT/xukSWFTLHYF5vAmTxy/h47pfc5mCoxe8Ljv3N9eEbqG9T9ULNl/1HuzjWgienmkKz6s0VBRlCPDqziKJBeCnN+7in065I= ARC-Message-Signature:i=1; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 31/05/2024 08:07, Daehwan Jung wrote: > This is set by dwc3 parent node to support writing high-low order. > > Signed-off-by: Daehwan Jung > --- > drivers/usb/host/xhci-plat.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c > index 3d071b8..31bdfa5 100644 > --- a/drivers/usb/host/xhci-plat.c > +++ b/drivers/usb/host/xhci-plat.c > @@ -256,6 +256,9 @@ int xhci_plat_probe(struct platform_device *pdev, struct device *sysdev, const s > if (device_property_read_bool(tmpdev, "xhci-sg-trb-cache-size-quirk")) > xhci->quirks |= XHCI_SG_TRB_CACHE_SIZE_QUIRK; > > + if (device_property_read_bool(tmpdev, "write-64-hi-lo-quirk")) > + xhci->quirks |= XHCI_WRITE_64_HI_LO; Where is any user of this property (DTS)? Just to clarify: your downstream does not matter really. Best regards, Krzysztof