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From: Thomas Gleixner <tglx@linutronix.de>
To: Peter Schneider <pschneider1968@googlemail.com>
Cc: LKML <linux-kernel@vger.kernel.org>, x86@kernel.org,
 stable@vger.kernel.org, regressions@lists.linux.dev
Subject: Re: Kernel 6.9 regression: X86: Bogus messages from topology detection
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Date: Fri, 31 May 2024 10:33:11 +0200
Message-ID: <87ikyu8jp4.ffs@tglx>
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Peter!

On Fri, May 31 2024 at 08:52, Peter Schneider wrote:
> Am 30.05.2024 um 18:24 schrieb Thomas Gleixner:
> With that patch applied, I now get a build error:
>
> arch/x86/xen/enlighten_pv.c: In Funktion =C2=BBxen_start_kernel=C2=AB:
> arch/x86/xen/enlighten_pv.c:1388:9: Fehler: Implizite Deklaration der Fun=
ktion=20
> =C2=BBget_cpu_cap=C2=AB; meinten Sie =C2=BBset_cpu_cap=C2=AB? [-Werror=3D=
implicit-function-declaration]
>   1388 |         get_cpu_cap(&boot_cpu_data);

Bah. Updated patch below.

Thanks,

        tglx
---
Subject: x86/topology/intel: Unlock CPUID before evaluating anything
From: Thomas Gleixner <tglx@linutronix.de>
Date: Thu, 30 May 2024 17:29:18 +0200

Intel CPUs have a MSR bit to limit CPUID enumeration to leaf two. If this
bit is set by the BIOS then CPUID evaluation including topology enumeration
does not work correctly as the evaluation code does not try to analyze any
leaf greater than two.

This went unnoticed before because the original topology code just repeated
evaluation several times and managed to overwrite the initial limited
information with the correct one later. The new evaluation code does it
once and therefore ends up with the limited and wrong information.

Cure this by unlocking CPUID right before evaluating anything which depends
on the maximum CPUID leaf being greater than two instead of rereading stuff
after unlock.

Fixes: 22d63660c35e ("x86/cpu: Use common topology code for Intel")
Reported-by: Peter Schneider <pschneider1968@googlemail.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/kernel/cpu/common.c |    3 ++-
 arch/x86/kernel/cpu/intel.c  |   25 ++++++++++++++++---------
 2 files changed, 18 insertions(+), 10 deletions(-)

--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1585,6 +1585,7 @@ static void __init early_identify_cpu(st
 	if (have_cpuid_p()) {
 		cpu_detect(c);
 		get_cpu_vendor(c);
+		intel_unlock_cpuid_leafs(c);
 		get_cpu_cap(c);
 		setup_force_cpu_cap(X86_FEATURE_CPUID);
 		get_cpu_address_sizes(c);
@@ -1744,7 +1745,7 @@ static void generic_identify(struct cpui
 	cpu_detect(c);
=20
 	get_cpu_vendor(c);
-
+	intel_unlock_cpuid_leafs(c);
 	get_cpu_cap(c);
=20
 	get_cpu_address_sizes(c);
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -269,19 +269,26 @@ static void detect_tme_early(struct cpui
 	c->x86_phys_bits -=3D keyid_bits;
 }
=20
+void intel_unlock_cpuid_leafs(struct cpuinfo_x86 *c)
+{
+	if (boot_cpu_data.x86_vendor !=3D X86_VENDOR_INTEL)
+		return;
+
+	if (c->x86 < 6 || (c->x86 =3D=3D 6 && c->x86_model < 0xd))
+		return;
+
+	/*
+	 * The BIOS can have limited CPUID to leaf 2, which breaks feature
+	 * enumeration. Unlock it and update the maximum leaf info.
+	 */
+	if (msr_clear_bit(MSR_IA32_MISC_ENABLE, MSR_IA32_MISC_ENABLE_LIMIT_CPUID_=
BIT) > 0)
+		c->cpuid_level =3D cpuid_eax(0);
+}
+
 static void early_init_intel(struct cpuinfo_x86 *c)
 {
 	u64 misc_enable;
=20
-	/* Unmask CPUID levels if masked: */
-	if (c->x86 > 6 || (c->x86 =3D=3D 6 && c->x86_model >=3D 0xd)) {
-		if (msr_clear_bit(MSR_IA32_MISC_ENABLE,
-				  MSR_IA32_MISC_ENABLE_LIMIT_CPUID_BIT) > 0) {
-			c->cpuid_level =3D cpuid_eax(0);
-			get_cpu_cap(c);
-		}
-	}
-
 	if ((c->x86 =3D=3D 0xf && c->x86_model >=3D 0x03) ||
 		(c->x86 =3D=3D 0x6 && c->x86_model >=3D 0x0e))
 		set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);