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[2001:14ba:a0c3:3a00::227]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-52b84d8974esm253556e87.256.2024.05.31.01.30.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 May 2024 01:30:04 -0700 (PDT) Date: Fri, 31 May 2024 11:30:02 +0300 From: Dmitry Baryshkov To: Baolu Lu Cc: Joerg Roedel , Will Deacon , Robin Murphy , Jason Gunthorpe , Kevin Tian , Yi Liu , David Airlie , Daniel Vetter , Kalle Valo , Bjorn Andersson , Mathieu Poirier , Alex Williamson , mst@redhat.com, Jason Wang , Thierry Reding , Jonathan Hunter , Mikko Perttunen , iommu@lists.linux.dev, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 06/20] drm/msm: Use iommu_paging_domain_alloc() Message-ID: References: <20240529053250.91284-1-baolu.lu@linux.intel.com> <20240529053250.91284-7-baolu.lu@linux.intel.com> <960bfc23-22b3-48d1-baa6-2707767875c5@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Fri, May 31, 2024 at 09:57:54AM +0800, Baolu Lu wrote: > On 5/30/24 3:58 PM, Dmitry Baryshkov wrote: > > On Thu, 30 May 2024 at 04:59, Baolu Lu wrote: > > > On 5/29/24 4:21 PM, Dmitry Baryshkov wrote: > > > > On Wed, May 29, 2024 at 01:32:36PM +0800, Lu Baolu wrote: > > > > > The domain allocated in msm_iommu_new() is for the @dev. Replace > > > > > iommu_domain_alloc() with iommu_paging_domain_alloc() to make it explicit. > > > > > > > > > > Update msm_iommu_new() to always return ERR_PTR in failure cases instead > > > > > of NULL. > > > > Please don't mix unrelated changes, because ... > > > > > > > > > Signed-off-by: Lu Baolu > > > > > --- > > > > > drivers/gpu/drm/msm/msm_iommu.c | 8 ++++---- > > > > > 1 file changed, 4 insertions(+), 4 deletions(-) > > > > > > > > > > diff --git a/drivers/gpu/drm/msm/msm_iommu.c b/drivers/gpu/drm/msm/msm_iommu.c > > > > > index d5512037c38b..f7e28d4b5f62 100644 > > > > > --- a/drivers/gpu/drm/msm/msm_iommu.c > > > > > +++ b/drivers/gpu/drm/msm/msm_iommu.c > > > > > @@ -407,9 +407,9 @@ struct msm_mmu *msm_iommu_new(struct device *dev, unsigned long quirks) > > > > > struct msm_iommu *iommu; > > > > > int ret; > > > > > > > > > > - domain = iommu_domain_alloc(dev->bus); > > > > > - if (!domain) > > > > > - return NULL; > > > > > + domain = iommu_paging_domain_alloc(dev); > > > > > + if (IS_ERR(domain)) > > > > > + return ERR_CAST(domain); > > > > > > > > > > iommu_set_pgtable_quirks(domain, quirks); > > > > > > > > > > @@ -441,7 +441,7 @@ struct msm_mmu *msm_iommu_gpu_new(struct device *dev, struct msm_gpu *gpu, unsig > > > > > struct msm_mmu *mmu; > > > > > > > > > > mmu = msm_iommu_new(dev, quirks); > > > > > - if (IS_ERR_OR_NULL(mmu)) > > > > > + if (IS_ERR(mmu)) > > > > > return mmu; > > > > NAK, not having an IOMMU is a poor but legit usecase for some of devices > > > > which don't have IOMMU support yet (for example because of the buggy > > > > implementation for which we were not able to get all the hooks in). > > > > > > > > Please don't break compatibility for existing platforms. > > > Sure. I will remove this line of change. Though I have no idea in which > > > case msm_iommu_new() could return NULL after this patch. > > So, even without this chunk you are going to break the no-IOMMU case. > > Please don't. This will result in a regression report and a revert. > > > > Instead please provide a way for the existing drivers to continue > > working. For example, something like: > > > > if (IS_ERR(mmu) && ERR_PTR(mmu) == -ENODEV)) > > return NULL; > > Oh I see. msm_iommu_new() returning NULL indicates a no-IOMMU case, > right? So perhaps we can make it explicit like below? > > if (!device_iommu_mapped(dev)) > return NULL; > > domain = iommu_paging_domain_alloc(dev); > if (IS_ERR(domain)) > return ERR_CAST(domain); Yes, this should work, thank you. -- With best wishes Dmitry