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References: <20240531093211.498880-1-colin.i.king@gmail.com> <833fac2c-91f9-4e9a-9b9e-da2db955a488@infradead.org>
In-Reply-To: <833fac2c-91f9-4e9a-9b9e-da2db955a488@infradead.org>
From: Alex Deucher <alexdeucher@gmail.com>
Date: Fri, 31 May 2024 14:20:29 -0400
Message-ID: <CADnq5_NCA31yex7Ye=hoVbMkpCzbgpBJvGrGub+AQ1jQBcCeCA@mail.gmail.com>
Subject: Re: [PATCH][next] drm/amd/display: Fix a handful of spelling mistakes
To: Randy Dunlap <rdunlap@infradead.org>
Cc: Colin Ian King <colin.i.king@gmail.com>, Harry Wentland <harry.wentland@amd.com>, 
	Leo Li <sunpeng.li@amd.com>, Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>, 
	Alex Deucher <alexander.deucher@amd.com>, =?UTF-8?Q?Christian_K=C3=B6nig?= <christian.koenig@amd.com>, 
	Xinhui.Pan@amd.com, David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>, 
	Alex Hung <alex.hung@amd.com>, amd-gfx@lists.freedesktop.org, 
	dri-devel@lists.freedesktop.org, kernel-janitors@vger.kernel.org, 
	linux-kernel@vger.kernel.org
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Applied.  Thanks!

Alex

On Fri, May 31, 2024 at 11:37=E2=80=AFAM Randy Dunlap <rdunlap@infradead.or=
g> wrote:
>
>
>
> On 5/31/24 2:32 AM, Colin Ian King wrote:
> > There are a few spelling mistakes in dml2_printf messages. Fix them.
> >
> > Signed-off-by: Colin Ian King <colin.i.king@gmail.com>
>
>
> Reviewed-by: Randy Dunlap <rdunlap@infradead.org>
>
> Thanks.
>
> > ---
> >  .../dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c      | 6 +++---
> >  .../display/dc/dml2/dml21/src/dml2_core/dml2_core_shared.c  | 6 +++---
> >  2 files changed, 6 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dm=
l2_core_dcn4_calcs.c b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_c=
ore/dml2_core_dcn4_calcs.c
> > index 8062144a5a6d..e7e6751f4477 100644
> > --- a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core=
_dcn4_calcs.c
> > +++ b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core=
_dcn4_calcs.c
> > @@ -5731,7 +5731,7 @@ static bool CalculatePrefetchSchedule(struct dml2=
_core_internal_scratch *scratch
> >               dml2_printf("DML: Tvm: %fus - time to fetch vm\n", s->Tim=
eForFetchingVM);
> >               dml2_printf("DML: Tr0: %fus - time to fetch first row of =
data pagetables\n", s->TimeForFetchingRowInVBlank);
> >               dml2_printf("DML: Tsw: %fus =3D time to fetch enough pixe=
l data and cursor data to feed the scalers init position and detile\n", (do=
uble)s->LinesToRequestPrefetchPixelData * s->LineTime);
> > -             dml2_printf("DML: To: %fus - time for propogation from sc=
aler to optc\n", (*p->DSTYAfterScaler + ((double)(*p->DSTXAfterScaler) / (d=
ouble)p->myPipe->HTotal)) * s->LineTime);
> > +             dml2_printf("DML: To: %fus - time for propagation from sc=
aler to optc\n", (*p->DSTYAfterScaler + ((double)(*p->DSTXAfterScaler) / (d=
ouble)p->myPipe->HTotal)) * s->LineTime);
> >               dml2_printf("DML: Tvstartup - TSetup - Tcalc - TWait - Tp=
re - To > 0\n");
> >               dml2_printf("DML: Tslack(pre): %fus - time left over in s=
chedule\n", p->VStartup * s->LineTime - s->TimeForFetchingVM - 2 * s->TimeF=
orFetchingRowInVBlank - (*p->DSTYAfterScaler + ((double)(*p->DSTXAfterScale=
r) / (double)p->myPipe->HTotal)) * s->LineTime - p->TWait - p->TCalc - *p->=
TSetup);
> >               dml2_printf("DML: row_bytes =3D dpte_row_bytes (per_pipe)=
 =3D PixelPTEBytesPerRow =3D : %u\n", p->PixelPTEBytesPerRow);
> > @@ -8268,7 +8268,7 @@ static bool dml_core_mode_support(struct dml2_cor=
e_calcs_mode_support_ex *in_out
> >       dml2_printf("DML::%s: mode_lib->ms.DCFCLK =3D %f\n", __func__, mo=
de_lib->ms.DCFCLK);
> >       dml2_printf("DML::%s: mode_lib->ms.FabricClock =3D %f\n", __func_=
_, mode_lib->ms.FabricClock);
> >       dml2_printf("DML::%s: mode_lib->ms.uclk_freq_mhz =3D %f\n", __fun=
c__, mode_lib->ms.uclk_freq_mhz);
> > -     dml2_printf("DML::%s: urgent latency tolarance =3D %f\n", __func_=
_, ((mode_lib->ip.rob_buffer_size_kbytes - mode_lib->ip.pixel_chunk_size_kb=
ytes) * 1024 / (mode_lib->ms.DCFCLK * mode_lib->soc.return_bus_width_bytes)=
));
> > +     dml2_printf("DML::%s: urgent latency tolerance =3D %f\n", __func_=
_, ((mode_lib->ip.rob_buffer_size_kbytes - mode_lib->ip.pixel_chunk_size_kb=
ytes) * 1024 / (mode_lib->ms.DCFCLK * mode_lib->soc.return_bus_width_bytes)=
));
> >  #endif
> >
> >       mode_lib->ms.support.OutstandingRequestsSupport =3D true;
> > @@ -11089,7 +11089,7 @@ static bool dml_core_mode_programming(struct dm=
l2_core_calcs_mode_programming_ex
> >                               if (display_cfg->plane_descriptors[k].imm=
ediate_flip && mode_lib->mp.ImmediateFlipSupportedForPipe[k] =3D=3D false) =
{
> >                                       mode_lib->mp.ImmediateFlipSupport=
ed =3D false;
> >  #ifdef __DML_VBA_DEBUG__
> > -                                     dml2_printf("DML::%s: Pipe %0d no=
t supporing iflip!\n", __func__, k);
> > +                                     dml2_printf("DML::%s: Pipe %0d no=
t supporting iflip!\n", __func__, k);
> >  #endif
> >                               }
> >                       }
> > diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dm=
l2_core_shared.c b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/=
dml2_core_shared.c
> > index f2e2250d28d3..6eb3fec87ec1 100644
> > --- a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core=
_shared.c
> > +++ b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core=
_shared.c
> > @@ -1988,7 +1988,7 @@ bool dml2_core_shared_mode_support(struct dml2_co=
re_calcs_mode_support_ex *in_ou
> >       dml2_printf("DML::%s: mode_lib->ms.FabricClock =3D %f\n", __func_=
_, mode_lib->ms.FabricClock);
> >       dml2_printf("DML::%s: mode_lib->ms.uclk_freq_mhz =3D %f\n", __fun=
c__, mode_lib->ms.uclk_freq_mhz);
> >       dml2_printf("DML::%s: max_urgent_latency_us =3D %f\n", __func__, =
mode_lib->ms.support.max_urgent_latency_us);
> > -     dml2_printf("DML::%s: urgent latency tolarance =3D %f\n", __func_=
_, ((mode_lib->ip.rob_buffer_size_kbytes - mode_lib->ip.pixel_chunk_size_kb=
ytes) * 1024 / (mode_lib->ms.DCFCLK * mode_lib->soc.return_bus_width_bytes)=
));
> > +     dml2_printf("DML::%s: urgent latency tolerance =3D %f\n", __func_=
_, ((mode_lib->ip.rob_buffer_size_kbytes - mode_lib->ip.pixel_chunk_size_kb=
ytes) * 1024 / (mode_lib->ms.DCFCLK * mode_lib->soc.return_bus_width_bytes)=
));
> >  #endif
> >
> >       mode_lib->ms.support.OutstandingRequestsSupport =3D true;
> > @@ -8131,7 +8131,7 @@ static bool CalculatePrefetchSchedule(struct dml2=
_core_internal_scratch *scratch
> >               dml2_printf("DML: Tvm: %fus - time to fetch vm\n", s->Tim=
eForFetchingVM);
> >               dml2_printf("DML: Tr0: %fus - time to fetch first row of =
data pagetables\n", s->TimeForFetchingRowInVBlank);
> >               dml2_printf("DML: Tsw: %fus =3D time to fetch enough pixe=
l data and cursor data to feed the scalers init position and detile\n", (do=
uble)s->LinesToRequestPrefetchPixelData * s->LineTime);
> > -             dml2_printf("DML: To: %fus - time for propogation from sc=
aler to optc\n", (*p->DSTYAfterScaler + ((double)(*p->DSTXAfterScaler) / (d=
ouble)p->myPipe->HTotal)) * s->LineTime);
> > +             dml2_printf("DML: To: %fus - time for propagation from sc=
aler to optc\n", (*p->DSTYAfterScaler + ((double)(*p->DSTXAfterScaler) / (d=
ouble)p->myPipe->HTotal)) * s->LineTime);
> >               dml2_printf("DML: Tvstartup - TSetup - Tcalc - TWait - Tp=
re - To > 0\n");
> >               dml2_printf("DML: Tslack(pre): %fus - time left over in s=
chedule\n", p->VStartup * s->LineTime - s->TimeForFetchingVM - 2 * s->TimeF=
orFetchingRowInVBlank - (*p->DSTYAfterScaler + ((double)(*p->DSTXAfterScale=
r) / (double)p->myPipe->HTotal)) * s->LineTime - p->TWait - p->TCalc - *p->=
TSetup);
> >               dml2_printf("DML: row_bytes =3D dpte_row_bytes (per_pipe)=
 =3D PixelPTEBytesPerRow =3D : %u\n", p->PixelPTEBytesPerRow);
> > @@ -10959,7 +10959,7 @@ bool dml2_core_shared_mode_programming(struct d=
ml2_core_calcs_mode_programming_e
> >                               if (display_cfg->plane_descriptors[k].imm=
ediate_flip && mode_lib->mp.ImmediateFlipSupportedForPipe[k] =3D=3D false) =
{
> >                                       mode_lib->mp.ImmediateFlipSupport=
ed =3D false;
> >  #ifdef __DML_VBA_DEBUG__
> > -                                     dml2_printf("DML::%s: Pipe %0d no=
t supporing iflip!\n", __func__, k);
> > +                                     dml2_printf("DML::%s: Pipe %0d no=
t supporting iflip!\n", __func__, k);
> >  #endif
> >                               }
> >                       }
>
> --
> #Randy
> https://people.kernel.org/tglx/notes-about-netiquette
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