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[2001:14ba:a0c3:3a00::227]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-52b8beaf911sm206658e87.20.2024.05.31.12.50.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 May 2024 12:50:28 -0700 (PDT) Date: Fri, 31 May 2024 22:50:26 +0300 From: Dmitry Baryshkov To: Abel Vesa Cc: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Johan Hovold , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 2/2] phy: qcom: qmp-pcie: Add X1E80100 Gen4 4-lane mode support Message-ID: References: <20240531-x1e80100-phy-add-gen4x4-v1-0-5c841dae7850@linaro.org> <20240531-x1e80100-phy-add-gen4x4-v1-2-5c841dae7850@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240531-x1e80100-phy-add-gen4x4-v1-2-5c841dae7850@linaro.org> On Fri, May 31, 2024 at 07:06:45PM +0300, Abel Vesa wrote: > The PCIe 6th instance from X1E80100 can be used in both 4-lane mode or > 2-lane mode. Add the configuration and compatible for the 4-lane mode. > > Signed-off-by: Abel Vesa > --- > drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 42 ++++++++++++++++++++++++++++++++ > 1 file changed, 42 insertions(+) > Reviewed-by: Dmitry Baryshkov -- With best wishes Dmitry