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Sat, 1 Jun 2024 07:16:21 -0500 Received: from uda0492258.dhcp.ti.com (uda0492258.dhcp.ti.com [172.24.227.9]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 451CFtkJ009323; Sat, 1 Jun 2024 07:16:17 -0500 From: Siddharth Vadapalli To: , , , , , , , CC: , , , , , , Subject: [PATCH v4 5/7] arm64: dts: ti: k3-serdes: Add SERDES0/SERDES1 lane-muxing macros for J722S Date: Sat, 1 Jun 2024 17:45:52 +0530 Message-ID: <20240601121554.2860403-6-s-vadapalli@ti.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240601121554.2860403-1-s-vadapalli@ti.com> References: <20240601121554.2860403-1-s-vadapalli@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 The SERDES0 and SERDES1 instances of SERDES on J722S are single lane SERDES which are individually muxed across different peripherals. LANE0 of SERDES0 is muxed between USB and CPSW while LANE0 of SERDES1 is muxed between PCIe and CPSW. Define the lane-muxing macros to be used as the idle state values. Co-developed-by: Ravi Gunasekaran Signed-off-by: Ravi Gunasekaran Signed-off-by: Siddharth Vadapalli --- v3: https://lore.kernel.org/r/20240524090514.152727-4-s-vadapalli@ti.com/ and https://lore.kernel.org/r/20240524090514.152727-6-s-vadapalli@ti.com/ Changes since v3: - Above changes have been squashed into this patch. arch/arm64/boot/dts/ti/k3-serdes.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-serdes.h b/arch/arm64/boot/dts/ti/k3-serdes.h index a011ad893b44..ef3606068140 100644 --- a/arch/arm64/boot/dts/ti/k3-serdes.h +++ b/arch/arm64/boot/dts/ti/k3-serdes.h @@ -201,4 +201,12 @@ #define J784S4_SERDES4_LANE3_USB 0x2 #define J784S4_SERDES4_LANE3_IP4_UNUSED 0x3 +/* J722S */ + +#define J722S_SERDES0_LANE0_USB 0x0 +#define J722S_SERDES0_LANE0_QSGMII_LANE2 0x1 + +#define J722S_SERDES1_LANE0_PCIE0_LANE0 0x0 +#define J722S_SERDES1_LANE0_QSGMII_LANE1 0x1 + #endif /* DTS_ARM64_TI_K3_SERDES_H */ -- 2.40.1