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Date: Sat, 1 Jun 2024 07:06:37 -0700
From: Kees Cook <kees@kernel.org>
To: Gatlin Newhouse <gatlin.newhouse@gmail.com>
Cc: Thomas Gleixner <tglx@linutronix.de>, Ingo Molnar <mingo@redhat.com>,
	Borislav Petkov <bp@alien8.de>,
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	Andrey Ryabinin <ryabinin.a.a@gmail.com>,
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	Josh Poimboeuf <jpoimboe@kernel.org>, Xin Li <xin3.li@intel.com>,
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	"Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
	linux-kernel@vger.kernel.org, kasan-dev@googlegroups.com,
	linux-hardening@vger.kernel.org, llvm@lists.linux.dev
Subject: Re: [PATCH v2] x86/traps: Enable UBSAN traps on x86
Message-ID: <202406010700.39246BA@keescook>
References: <20240601031019.3708758-1-gatlin.newhouse@gmail.com>
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In-Reply-To: <20240601031019.3708758-1-gatlin.newhouse@gmail.com>

On Sat, Jun 01, 2024 at 03:10:05AM +0000, Gatlin Newhouse wrote:
> +void handle_ubsan_failure(struct pt_regs *regs, int insn)
> +{
> +	u32 type = 0;
> +
> +	if (insn == INSN_ASOP) {
> +		type = (*(u16 *)(regs->ip + LEN_ASOP + LEN_UD1));
> +		if ((type & 0xFF) == 0x40)
> +			type = (type >> 8) & 0xFF;
> +	} else {
> +		type = (*(u16 *)(regs->ip + LEN_UD1));
> +		if ((type & 0xFF) == 0x40)
> +			type = (type >> 8) & 0xFF;
> +	}

The if/else code is repeated, but the only difference is the offset to
read from. Also, if the 0x40 is absent, we likely don't want to report
anything. So, perhaps:

	u16 offset = LEN_UD1;
	u32 type;

	if (insn == INSN_ASOP)
		offset += INSN_ASOP;
	type = *(u16 *)(regs->ip + offset);
	if ((type & 0xFF) != 0x40)
		return;

	type = (type >> 8) & 0xFF;
	pr_crit("%s at %pS\n", report_ubsan_failure(regs, type), (void *)regs->ip);


-- 
Kees Cook