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[2001:14ba:a0c3:3a00::227]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-52b84d3eb89sm713308e87.70.2024.06.01.09.32.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 01 Jun 2024 09:32:35 -0700 (PDT) Date: Sat, 1 Jun 2024 19:32:33 +0300 From: Dmitry Baryshkov To: Cristian Ciocaltea Cc: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Sandy Huang , Heiko =?utf-8?Q?St=C3=BCbner?= , Andy Yan , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mark Yao , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, kernel@collabora.com, Alexandre ARNOUD , Luis de Arquer , Algea Cao Subject: Re: [PATCH 00/14] Add initial support for the Rockchip RK3588 HDMI TX Controller Message-ID: References: <20240601-b4-rk3588-bridge-upstream-v1-0-f6203753232b@collabora.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240601-b4-rk3588-bridge-upstream-v1-0-f6203753232b@collabora.com> On Sat, Jun 01, 2024 at 04:12:22PM +0300, Cristian Ciocaltea wrote: > The RK3588 SoC family integrates a Quad-Pixel (QP) variant of the > Synopsys DesignWare HDMI TX controller used in the previous SoCs. > > It is HDMI 2.1 compliant and supports the following features, among > others: > > * Fixed Rate Link (FRL) > * 4K@120Hz and 8K@60Hz video modes > * Variable Refresh Rate (VRR) including Quick Media Switching (QMS) > * Fast Vactive (FVA) > * SCDC I2C DDC access > * TMDS Scrambler enabling 2160p@60Hz with RGB/YCbCr4:4:4 > * YCbCr4:2:0 enabling 2160p@60Hz at lower HDMI link speeds > * Multi-stream audio > * Enhanced Audio Return Channel (EARC) It would be really nice if you can take a look at using the HDMI connector framework (landed few days ago) with adaptations for the drm_bridge / drm_bridge_connector ([1]). Your comments for the drm_bridge patches would be defeinitely appreciated. [1] https://lore.kernel.org/dri-devel/20240531-bridge-hdmi-connector-v4-0-5110f7943622@linaro.org/ > > This is the last required component that needs to be supported in order > to enable the HDMI output functionality on the RK3588 based SBCs, such > as the RADXA Rock 5B. The other components are the Video Output > Processor (VOP2) and the Samsung IP based HDMI/eDP TX Combo PHY, for > which basic support has been already made available via [1] and [2], > respectively. > > The patches are grouped as follows: > * PATCH 1..7: DW HDMI TX driver refactor to minimize code duplication in > the new QP driver (no functional changes intended) > > * PATCH 8..11: Rockchip DW HDMI glue driver cleanup/improvements (no > functional changes intended) > > * PATCH 12..13: The new DW HDMI QP TX driver reusing the previously > exported functions and structs from existing DW HDMI TX driver > > * PATCH 14: Rockchip DW HDMI glue driver update to support RK3588 and > make use of DW HDMI QP TX > > They provide just the basic HDMI support for now, i.e. RGB output up to > 4K@60Hz, without audio, CEC or any of the HDMI 2.1 specific features. > Also note the vop2 driver is currently not able to properly handle all > display modes supported by the connected screens, e.g. it doesn't cope > with non-integer refresh rates. > > A possible workaround consists of enabling the display controller to > make use of the clock provided by the HDMI PHY PLL. This is still work > in progress and will be submitted later, as well as the required DTS > updates. > > To facilitate testing and experimentation, all HDMI output related > patches, including those part of this series, are available at [3]. > So far I could only verify this on the RADXA Rock 3A and 5B boards. > > Thanks, > Cristian > > [1]: 5a028e8f062f ("drm/rockchip: vop2: Add support for rk3588") > [2]: 553be2830c5f ("phy: rockchip: Add Samsung HDMI/eDP Combo PHY driver") > [3]: https://gitlab.collabora.com/hardware-enablement/rockchip-3588/linux/-/commits/rk3588-hdmi-bridge-v6.10-rc1 > > Signed-off-by: Cristian Ciocaltea > --- > Cristian Ciocaltea (14): > drm/bridge: dw-hdmi: Simplify clock handling > drm/bridge: dw-hdmi: Add dw-hdmi-common.h header > drm/bridge: dw-hdmi: Commonize dw_hdmi_i2c_adapter() > drm/bridge: dw-hdmi: Factor out AVI infoframe setup > drm/bridge: dw-hdmi: Factor out vmode setup > drm/bridge: dw-hdmi: Factor out hdmi_data_info setup > drm/bridge: dw-hdmi: Commonize dw_hdmi_connector_create() > drm/rockchip: dw_hdmi: Use modern drm_device based logging > drm/rockchip: dw_hdmi: Simplify clock handling > drm/rockchip: dw_hdmi: Use devm_regulator_get_enable() > drm/rockchip: dw_hdmi: Drop superfluous assignments of mpll_cfg, cur_ctr and phy_config > dt-bindings: display: rockchip,dw-hdmi: Add compatible for RK3588 > drm/bridge: synopsys: Add DW HDMI QP TX controller driver > drm/rockchip: dw_hdmi: Add basic RK3588 support > > .../display/rockchip/rockchip,dw-hdmi.yaml | 127 +++- > drivers/gpu/drm/bridge/synopsys/Makefile | 2 +- > drivers/gpu/drm/bridge/synopsys/dw-hdmi-common.h | 179 +++++ > drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c | 787 +++++++++++++++++++ > drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.h | 831 +++++++++++++++++++++ > drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 353 +++------ > drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 351 +++++++-- > include/drm/bridge/dw_hdmi.h | 8 + > 8 files changed, 2290 insertions(+), 348 deletions(-) > --- > base-commit: 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0 > change-id: 20240601-b4-rk3588-bridge-upstream-a27baff1b8fc > -- With best wishes Dmitry