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From: "harry.yu185" <harry.yu185@gmail.com>
To: corbet@lwn.net,
	catalin.marinas@arm.com,
	will@kernel.org,
	tglx@linutronix.de,
	maz@kernel.org
Cc: linux-doc@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	"harry.yu185" <harry.yu185@gmail.com>
Subject: [PATCH] irqchip/gic-v3: Add Allwinner sunxi001 erratum workaround
Date: Sun,  2 Jun 2024 15:10:58 +0800
Message-Id: <20240602071058.6405-1-harry.yu185@gmail.com>
Precedence: bulk

Allwinner A523 GIC600 integration does not support the
sharability feature. So assigned Erratum ID #sunxi001 for this
issue.

That the 0x0201643b ID is not Allwinner specific and thus
there is an extra of_machine_is_compatible() check.

Note, because more than one soc may have this problem, the 'sunxi'
name is used instead of a fixed soc name like A523.

Signed-off-by: harry.yu185 <harry.yu185@gmail.com>
---
 Documentation/arch/arm64/silicon-errata.rst |  2 ++
 arch/arm64/Kconfig                          | 10 ++++++++++
 drivers/irqchip/irq-gic-v3-its.c            | 21 +++++++++++++++++++++
 3 files changed, 33 insertions(+)

diff --git a/Documentation/arch/arm64/silicon-errata.rst b/Documentation/arch/arm64/silicon-errata.rst
index eb8af8032c31..351dd6094a6c 100644
--- a/Documentation/arch/arm64/silicon-errata.rst
+++ b/Documentation/arch/arm64/silicon-errata.rst
@@ -242,6 +242,8 @@ stable kernels.
 +----------------+-----------------+-----------------+-----------------------------+
 | Rockchip       | RK3588          | #3588001        | ROCKCHIP_ERRATUM_3588001    |
 +----------------+-----------------+-----------------+-----------------------------+
+| Allwinner      | SUN55IW3        | #sunxi001       | ALLWINNER_ERRATUM_SUNXI001  |
++----------------+-----------------+-----------------+-----------------------------+
 +----------------+-----------------+-----------------+-----------------------------+
 | Fujitsu        | A64FX           | E#010001        | FUJITSU_ERRATUM_010001      |
 +----------------+-----------------+-----------------+-----------------------------+
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 5d91259ee7b5..5a71227d119a 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -1279,6 +1279,16 @@ config ROCKCHIP_ERRATUM_3588001
 
 	  If unsure, say Y.
 
+config ALLWINNER_ERRATUM_SUNXI001
+	bool "Allwinner sunxi001: GIC600 can not support shareability attributes"
+	default y
+	help
+	  The Allwinner GIC600 SoC integration does not support ACE/ACE-lite.
+	  This means, that its sharability feature may not be used, even though it
+	  is supported by the IP itself.
+
+	  If unsure, say Y.
+
 config SOCIONEXT_SYNQUACER_PREITS
 	bool "Socionext Synquacer: Workaround for GICv3 pre-ITS"
 	default y
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index 40ebf1726393..d93348947353 100644
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -4775,6 +4775,19 @@ static bool __maybe_unused its_enable_rk3588001(void *data)
 	return true;
 }
 
+static bool __maybe_unused its_enable_sunxi001(void *data)
+{
+	struct its_node *its = data;
+
+	if (!of_machine_is_compatible("arm,sun55iw3p1"))
+		return false;
+
+	its->flags |= ITS_FLAGS_FORCE_NON_SHAREABLE;
+	gic_rdists->flags |= RDIST_FLAGS_FORCE_NON_SHAREABLE;
+
+	return true;
+}
+
 static bool its_set_non_coherent(void *data)
 {
 	struct its_node *its = data;
@@ -4836,6 +4849,14 @@ static const struct gic_quirk its_quirks[] = {
 		.mask   = 0xffffffff,
 		.init   = its_enable_rk3588001,
 	},
+#endif
+#ifdef CONFIG_ALLWINNER_ERRATUM_SUNXI001
+	{
+		.desc   = "ITS: Allwinner erratum sunxi001",
+		.iidr   = 0x0201643b,
+		.mask   = 0xffffffff,
+		.init   = its_enable_sunxi001,
+	},
 #endif
 	{
 		.desc   = "ITS: non-coherent attribute",
-- 
2.37.2