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[147.75.80.249]) by mx.google.com with ESMTPS id 4fb4d7f45d1cf-57a31c76efcsi3830947a12.433.2024.06.02.23.43.07 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 Jun 2024 23:43:07 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel+bounces-198665-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) client-ip=147.75.80.249; Authentication-Results: mx.google.com; arc=pass (i=1 spf=pass spfdomain=arm.com dmarc=pass fromdomain=arm.com); spf=pass (google.com: domain of linux-kernel+bounces-198665-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-198665-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id 045A81F20F35 for ; Mon, 3 Jun 2024 06:43:07 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id B237D481D0; Mon, 3 Jun 2024 06:40:23 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id E914C39850; Mon, 3 Jun 2024 06:40:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717396823; cv=none; b=TRL8e7JtjbOM43LuzQUTvZQXZB+6fOU/3rcwsJKEIcVNPcMxN7X5KPqDqfGxrIgo+QTwY9/zM5ZCic1wZICZSn+UL/bZhr8gJenAjqSOz4qmCthp8A5T1Vqj3CotcLabY/h64g9/diZ+mX7F84CePJKaNlZv/qPcVmVdTNEJxUo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717396823; c=relaxed/simple; bh=4qCOD28+gDDPVxKSgnmdGBRMHQNm8b5CkFtYsnujVjo=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=cMYB07yG43SDv4mYfFEFt2uT4CGutI2IWoPirCZ/W0vHjOsrbAn4PpVNLuHf2id+zAiYcdLHkX2KrJ7/iQiUsccOxIeiqCjUkYp1cU7PCIrxJ95gtcqqb2WGINdecS9Gtd0MjHc5MvL8M426TQmy/8PODA9mvPVlWPJutFlgQRo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 484E11042; Sun, 2 Jun 2024 23:40:44 -0700 (PDT) Received: from [10.162.40.16] (a077893.blr.arm.com [10.162.40.16]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 59D243F792; Sun, 2 Jun 2024 23:40:15 -0700 (PDT) Message-ID: <8ec0f93a-a1f9-4b04-875c-dd4a9172e339@arm.com> Date: Mon, 3 Jun 2024 12:10:12 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH V17 3/9] drivers: perf: arm_pmu: Add infrastructure for branch stack sampling Content-Language: en-US To: Mark Rutland Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, will@kernel.org, catalin.marinas@arm.com, Mark Brown , James Clark , Rob Herring , Marc Zyngier , Suzuki Poulose , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , linux-perf-users@vger.kernel.org References: <20240405024639.1179064-1-anshuman.khandual@arm.com> <20240405024639.1179064-4-anshuman.khandual@arm.com> From: Anshuman Khandual In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 5/21/24 19:14, Mark Rutland wrote: > On Fri, Apr 05, 2024 at 08:16:33AM +0530, Anshuman Khandual wrote: >> In order to support the Branch Record Buffer Extension (BRBE), we need to >> extend the arm_pmu framework with some basic infrastructure for the branch >> stack sampling which arm_pmu drivers can opt-in using a new feature flag >> called 'has_branch_stack'. Subsequent patches will use this to add support >> for BRBE in the PMUv3 driver. > > Please, just use ther *exact* wording I asked for last time: > > | In order to support the Branch Record Buffer Extension (BRBE), we need to > | extend the arm_pmu framework with some basic infrastructure for branch stack > | sampling which arm_pmu drivers can opt-in to using. Subsequent patches will > | use this to add support for BRBE in the PMUv3 driver. > > At this point in the commit message, the 'has_branch_stack' flag doesn't > matter, and dropping the 'to' after 'opt-in' makes this painful to read. Okay, will replace with the original paragraph. > >> Branch stack sampling support i.e capturing branch records during execution >> in core perf, rides along with normal HW events being scheduled on the PMU. >> This prepares ARMV8 PMU framework for branch stack support on relevant PMUs >> with required HW implementation. > > Please delete this paragraph. Done. > >> With BRBE, the hardware records branches into a hardware FIFO, which will >> be sampled by software when perf events overflow. A task may be context- >> switched an arbitrary number of times between overflows, and to avoid >> losing samples we need to save the current records when a task is context- >> switched out. To do these we'll need to use the pmu::sched_task() callback, >> and we'll also need to allocate some per-task storage space via event flag >> PERF_ATTACH_TASK_DATA. > > [...] > >> /* The events for a given PMU register set. */ >> struct pmu_hw_events { >> /* >> @@ -66,6 +78,17 @@ struct pmu_hw_events { >> struct arm_pmu *percpu_pmu; >> >> int irq; >> + >> + struct branch_records *branches; >> + >> + /* Active context for task events */ >> + void *branch_context; >> + >> + /* Active events requesting branch records */ >> + unsigned int branch_users; >> + >> + /* Active branch sample type filters */ >> + unsigned long branch_sample_type; >> }; > > At this point in the series I understand why we have the 'branches' and > 'branch_users' fields, but the 'branch_context' and 'branch_sample_type' > fields haven't been introduced and are not obvious. > > What exactly is branch_context, and why is that a 'void *' ? branch_context tracks event->ctx which is 'struct perf_event_context *'. The 'void *' seemed more generic in case this tracking structure changes later. But this could be changed as 'struct perf_event_context *' if required. > > I can understand if that's a PMU-specific structure to track the active > branch records, but if so I don't understand why 'branch_sample_type' > isn't folded into that. branch_sample_type is applicable both for cpu and task bound events, where as branch_context is applicable only for task bound events tracking their active branch records that need to be dropped (or saved), in case a cpu bound event comes in.