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[2604:1380:4601:e00::3]) by mx.google.com with ESMTPS id 4fb4d7f45d1cf-57a31c629c0si3826762a12.267.2024.06.03.02.45.09 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Jun 2024 02:45:09 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel+bounces-198922-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) client-ip=2604:1380:4601:e00::3; Authentication-Results: mx.google.com; arc=pass (i=1 spf=pass spfdomain=arm.com dmarc=pass fromdomain=arm.com); spf=pass (google.com: domain of linux-kernel+bounces-198922-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-kernel+bounces-198922-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id 7970D1F22AEE for ; Mon, 3 Jun 2024 09:44:29 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 5B883127E06; Mon, 3 Jun 2024 09:39:00 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 3CFEC1272A7; Mon, 3 Jun 2024 09:38:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717407539; cv=none; b=W/DK/5bFKE6tJOVTJr5ErVbRW5frjQHao+gJ+lUySOcLyRMeIpJw8Laeuyn0J7kvZfOg81baiMgY0+qyk2eq0ZB1cXOoJTZ0hZM6LFE+igDx9bCEzXnRSDRt0rySzC3te+2dT5nuySCuwQ/UHgtFdSfG2BBNsKNxNgI8TBMU1sE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717407539; c=relaxed/simple; bh=gEcQZBpRJHNIjOOJm8fOCp1xnDRgdhaQLEzUWoXDs74=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=U0r0hKlW7C95Y0C0+fScMjG60GuqLxg7Y8ishIgTHK8FAoxyYk4N9fwnc/1H3yK8B54AwzRP+0EBvfSEUzof2YCEown60ZasrjLIJqn4Iv3MD6jnmaY35Jw359LSDEI0i9/mhGzMowQ7EhgW4yPCXz0wxzeEDW3IvogNwvNINQI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 04ECD1042; Mon, 3 Jun 2024 02:39:22 -0700 (PDT) Received: from J2N7QTR9R3 (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2B29A3F762; Mon, 3 Jun 2024 02:38:55 -0700 (PDT) Date: Mon, 3 Jun 2024 10:38:46 +0100 From: Mark Rutland To: Anshuman Khandual Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, will@kernel.org, catalin.marinas@arm.com, Mark Brown , James Clark , Rob Herring , Marc Zyngier , Suzuki Poulose , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , linux-perf-users@vger.kernel.org, Jonathan Corbet , Oliver Upton , linux-doc@vger.kernel.org Subject: Re: [PATCH V17 4/9] arm64/boot: Enable EL2 requirements for BRBE Message-ID: References: <20240405024639.1179064-1-anshuman.khandual@arm.com> <20240405024639.1179064-5-anshuman.khandual@arm.com> <7d765803-49ed-4847-a2d1-f0c3b3e2c79c@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <7d765803-49ed-4847-a2d1-f0c3b3e2c79c@arm.com> On Mon, Jun 03, 2024 at 02:41:32PM +0530, Anshuman Khandual wrote: > On 5/29/24 16:21, Mark Rutland wrote: > > On Fri, Apr 05, 2024 at 08:16:34AM +0530, Anshuman Khandual wrote: > >> + For CPUs with feature Branch Record Buffer Extension (FEAT_BRBE): > >> + > >> + - If the kernel is entered at EL2 and EL1 is present: > >> + > >> + - BRBCR_EL1.CC (bit 3) must be initialised to 0b1. > >> + - BRBCR_EL1.MPRED (bit 4) must be initialised to 0b1. > > > > IIUC this isn't necessary; if the kernel is entered at EL2, it's capable > > of initializing the EL1 regs, and it doesn't look like this silently > > affects something we'd need in the absence of a BRBE driver. > > No, this does not affect anything other than the BRBE driver. Ok. > > AFAICT the __init_el2_brbe() code you add below handles this, so I think > > this is redundant and can be deleted. > > Did not understand the above. __init_el2_brbe() handles setting both BRBCR_EL2 > and BRBCR_EL1 for CC and MPRED config irrespective of whether the kernel enters > EL2 directly or enters EL1 via EL2. But should not that be documented here for > both those scenarios ? OR because once the kernel is in EL2, it can configure > EL1 as required, so it is not a booting requirement anymore ? The latter -- since the kernel can set this up, and only needs to do that for the BRBE driver to work, this doesn't need to be a requiremnt on FW/bootloader. So we can drop this when the kernel is booted at EL2. Mark.