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From: Mike Looijmans <mike.looijmans@topic.nl>
To: devicetree@vger.kernel.org
CC: Mike Looijmans <mike.looijmans@topic.nl>,
	Conor Dooley <conor+dt@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Rob Herring <robh@kernel.org>,
	Shawn Guo <shawnguo@kernel.org>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH] arm64: dts: ls1028a-rdb: Add EEPROM nodes to I2C bus
Date: Tue, 4 Jun 2024 08:27:22 +0200
Message-ID: <20240604062723.82703-1-mike.looijmans@topic.nl>
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The LS1028ARDB board contains three EEPROM devices, for
storing boot code, DDR SPD and board information. Add the
missing entries to the devicetree.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
---

 .../boot/dts/freescale/fsl-ls1028a-rdb.dts    | 31 +++++++++++++++++++
 1 file changed, 31 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts b/arch/arm64=
/boot/dts/freescale/fsl-ls1028a-rdb.dts
index ecd2c1ea177f..757a34ba7da3 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
@@ -201,6 +201,37 @@ i2c-mux@77 {
 		#address-cells =3D <1>;
 		#size-cells =3D <0>;
=20
+		i2c@0 {
+			#address-cells =3D <1>;
+			#size-cells =3D <0>;
+			reg =3D <0x0>;
+
+			/* Atmel AT24C512C-XHD=C2=ADB: 64 KB EEPROM */
+			eeprom@50 {
+				compatible =3D "atmel,24c512";
+				reg =3D <0x50>;
+				#address-cells =3D <1>;
+				#size-cells =3D <1>;
+			};
+
+			/* AT24C04C 512-byte DDR4 SPD EEPROM */
+			/* Documentation says 0x51, but must be even and i2cdetect says 0x52 */
+			eeprom@52 {
+				compatible =3D "atmel,24c04";
+				reg =3D <0x52>;
+				#address-cells =3D <1>;
+				#size-cells =3D <1>;
+			};
+
+			/* Atmel AT24C02C-XHM=C2=ADB: 256-byte EEPROM */
+			eeprom@57 {
+				compatible =3D "atmel,24c02";
+				reg =3D <0x57>;
+				#address-cells =3D <1>;
+				#size-cells =3D <1>;
+			};
+		};
+
 		i2c@1 {
 			#address-cells =3D <1>;
 			#size-cells =3D <0>;
--=20
2.34.1


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