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Tue, 4 Jun 2024 11:15:12 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id B6222216851; Tue, 4 Jun 2024 11:13:54 +0200 (CEST) Received: from [10.48.86.164] (10.48.86.164) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Tue, 4 Jun 2024 11:13:51 +0200 Message-ID: <627a2182-527c-444d-9485-817c69f57036@foss.st.com> Date: Tue, 4 Jun 2024 11:13:50 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 02/11] net: stmmac: dwmac-stm32: Separate out external clock rate validation To: "Russell King (Oracle)" CC: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Richard Cochran , Jose Abreu , Liam Girdwood , Mark Brown , Marek Vasut , , , , , References: <20240603092757.71902-1-christophe.roullier@foss.st.com> <20240603092757.71902-3-christophe.roullier@foss.st.com> Content-Language: en-US From: Christophe ROULLIER In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.12.28.16 definitions=2024-06-04_03,2024-05-30_01,2024-05-17_01 On 6/3/24 11:38, Russell King (Oracle) wrote: > On Mon, Jun 03, 2024 at 11:27:48AM +0200, Christophe Roullier wrote: >> +static int stm32mp1_validate_ethck_rate(struct plat_stmmacenet_data *plat_dat) >> +{ >> + struct stm32_dwmac *dwmac = plat_dat->bsp_priv; >> + const u32 clk_rate = clk_get_rate(dwmac->clk_eth_ck); >> + >> + switch (plat_dat->mac_interface) { > Should these be phy_interface? Hi, The code is validating the clock frequency of clock that are INPUT into the MAC. These clock can be generated by either the PHY, or Xtal, or some other source, but they are still the clock which are INPUT into the MAC. Therefore I believe mac_interface is correct here. > Does this clock depend on the interface > mode used with the PHY? > I don't think the clock depend on the PHY mode. Look at drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c : " 458         plat->phy_interface = phy_mode; 459         rc = stmmac_of_get_mac_mode(np); 460         plat->mac_interface = rc < 0 ? plat->phy_interface : rc; " and this comment: " 382 /** 383  * stmmac_of_get_mac_mode - retrieves the interface of the MAC 384  * @np: - device-tree node 385  * Description: 386  * Similar to `of_get_phy_mode()`, this function will retrieve (from 387  * the device-tree) the interface mode on the MAC side. This assumes 388  * that there is mode converter in-between the MAC & PHY 389  * (e.g. GMII-to-RGMII). 390  */ 391 static int stmmac_of_get_mac_mode(struct device_node *np) " I think in the unlikely case that you would have a mode converter between the MAC and PHY, the clock that are validated by this code would still be the clock that are INPUT into the MAC, i.e. clock on the MAC side of the mode converter and NOT on the PHY side , and those clock would not depend on the PHY mode, they would depend on the MAC mode .