Received: by 2002:a05:6500:1b41:b0:1fb:d597:ff75 with SMTP id cz1csp161800lqb; Tue, 4 Jun 2024 07:58:40 -0700 (PDT) X-Forwarded-Encrypted: i=3; AJvYcCVEqNP666q15GurJ0Q5F3iFQLGJMk7JK27zp9xJ/3W7JVW6OKG6vhtJ/k8D4j4mKwVFqo8auTh0qA//AZsxzeTJLFqXKg8IUuREBZv/5Q== X-Google-Smtp-Source: AGHT+IHlUNQ7DLm9bejU7SLyrmJ4vUHAWWyhcDO+SckOuq4Iv5LYGapHGV3+YGs6Rj9SzHcWNaPu X-Received: by 2002:a05:6359:4ca3:b0:19c:4478:59a3 with SMTP id e5c5f4694b2df-19c447859bdmr232558955d.17.1717513119980; Tue, 04 Jun 2024 07:58:39 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1717513119; cv=pass; d=google.com; s=arc-20160816; b=yDipzqGE9ht1VfYK3oif520jrc87tIenUKhZaCy6W901AAZLnWHm4JSfJNtu3ASmP7 kR6a8oA3qKxKrOqh1T7bEE1KeqtXTHJdZnTguhQHhdAw3SYOV5O/VFvHbferM4T68dQP rr770XOZajhyCZ6EppssbjrU94tR/rQrFbjeBYniswINLpf2RbwoYncrJSE+UioLjnyf HC9OS0b9HMhKtXLslExDxLMqDABiUKFdvh3CBJECfQbhib4zg8Y4pBQKoDIyGX/ANwEx LKIHK92IGI0Z30IvrF3ZetPm+xa7PF1Ygz5B7Gj1Gw/kGnrXn5TxAh7/lWEy1SGqp2ee hg4w== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from; bh=OyZD2bU3RG5cqrBEZ0mMlZBh6wDn/Bln4+aDmXyU/cw=; fh=PS2xZ37x6i1et2MxEVJy4TSpqrJZGNwd6DyYCR5/2fw=; b=bhZWSpeiMxuKriRLGMUNMs0Fqa1l72p2lmAzObo0TELUCqZSJaiqr8MHEspP3jYtOP OLwLWDAObj3bPtB0F3lnufjCTV+E3v5g1/ZYU0M2V9p5pEOANxvKvan7VNFiGX/eZPYM C1CFjOaMwn7+F7ACmVMzWzw4/tsbV2AWH+MuJr4nWJ9jtnDItgttj398+50VCrquAtD3 kbF66AqCa8MlSaRxcfq87ZFsbuQaOqY1XprQvmNQgqi0HnRCtiUgfpXekC3LfnLScWoV AefXmq4AiQujTEiUCmqXuyuPfRtQ2oJCEcINgIIawf9twXzR/+x7WbC8IxjIRfVKy4+v BBrw==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; arc=pass (i=1 spf=pass spfdomain=arm.com dmarc=pass fromdomain=arm.com); spf=pass (google.com: domain of linux-kernel+bounces-200841-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) smtp.mailfrom="linux-kernel+bounces-200841-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org. [147.75.48.161]) by mx.google.com with ESMTPS id 41be03b00d2f7-6c35c181c60si1678690a12.672.2024.06.04.07.58.39 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Jun 2024 07:58:39 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel+bounces-200841-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) client-ip=147.75.48.161; Authentication-Results: mx.google.com; arc=pass (i=1 spf=pass spfdomain=arm.com dmarc=pass fromdomain=arm.com); spf=pass (google.com: domain of linux-kernel+bounces-200841-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.48.161 as permitted sender) smtp.mailfrom="linux-kernel+bounces-200841-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sy.mirrors.kernel.org (Postfix) with ESMTPS id 811B1B25BAA for ; Tue, 4 Jun 2024 14:37:05 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 389CF14A091; Tue, 4 Jun 2024 14:33:27 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 1B1AA13D276; Tue, 4 Jun 2024 14:33:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717511606; cv=none; b=PbPpVLXd1OBAcyEbG/xl9wZ46YSrZZO43djo0fD9vcGMOkwIzYEQXQhAjLrhDMiGwR5I8C3FK8ROjsCYLpgrMwbq0VopH/lfBoGoy3m+xzmHlPXV14DzdxHOA7V7kFoBLgJq2644sKX18inlBh5DsQt9bwLlVXBqBMAb46Xjg5w= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717511606; c=relaxed/simple; bh=MoWb5IDkVJxigSO6G5+nbXoC9pg/6yDnaht5XYWhvsk=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Xz2bQQqRZnYWFnrvftiGk9S/4jHS1/JWOSlFrcNM/acMvMwof1qdCBECpyDcZCEHv87QJx/dND6DUCkLGQwTZmRdiwc+5bwhv2dScQMF4XbSjYY0LP3dvRXmjWJAnFFaSav85AMM5NBKExYgiyz1UE3AaFJx2bPy6HE2FvPgJdk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DBD161042; Tue, 4 Jun 2024 07:33:48 -0700 (PDT) Received: from e127643.broadband (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 82FDB3F64C; Tue, 4 Jun 2024 07:33:21 -0700 (PDT) From: James Clark To: coresight@lists.linaro.org, suzuki.poulose@arm.com, gankulkarni@os.amperecomputing.com, mike.leach@linaro.org, leo.yan@linux.dev, anshuman.khandual@arm.com Cc: James Clark , Alexander Shishkin , Maxime Coquelin , Alexandre Torgue , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Jiri Olsa , Ian Rogers , Adrian Hunter , John Garry , Will Deacon , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-perf-users@vger.kernel.org Subject: [PATCH v2 16/16] coresight: Emit sink ID in the HW_ID packets Date: Tue, 4 Jun 2024 15:30:25 +0100 Message-Id: <20240604143030.519906-17-james.clark@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240604143030.519906-1-james.clark@arm.com> References: <20240604143030.519906-1-james.clark@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit For Perf to be able to decode when per-sink trace IDs are used, emit the sink that's being written to for each ETM. Perf currently errors out if it sees a newer packet version so instead of bumping it, add a new minor version field. This can be used to signify new versions that have backwards compatible fields. Considering this change is only for high core count machines, it doesn't make sense to make a breaking change for everyone. Signed-off-by: James Clark --- drivers/hwtracing/coresight/coresight-core.c | 26 ++++++++++--------- .../hwtracing/coresight/coresight-etm-perf.c | 16 ++++++++---- drivers/hwtracing/coresight/coresight-priv.h | 1 + include/linux/coresight-pmu.h | 17 +++++++++--- 4 files changed, 39 insertions(+), 21 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c index d5aaeafe5c7d..b6a88df582e0 100644 --- a/drivers/hwtracing/coresight/coresight-core.c +++ b/drivers/hwtracing/coresight/coresight-core.c @@ -487,23 +487,25 @@ struct coresight_device *coresight_get_sink(struct list_head *path) return csdev; } +u32 coresight_get_sink_id(struct coresight_device *csdev) +{ + if (!csdev->ea) + return 0; + + /* + * See function etm_perf_add_symlink_sink() to know where + * this comes from. + */ + return (u32) (unsigned long) csdev->ea->var; +} + static int coresight_sink_by_id(struct device *dev, const void *data) { struct coresight_device *csdev = to_coresight_device(dev); - unsigned long hash; if (csdev->type == CORESIGHT_DEV_TYPE_SINK || - csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) { - - if (!csdev->ea) - return 0; - /* - * See function etm_perf_add_symlink_sink() to know where - * this comes from. - */ - hash = (unsigned long)csdev->ea->var; - - if ((u32)hash == *(u32 *)data) + csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) { + if (coresight_get_sink_id(csdev) == *(u32 *)data) return 1; } diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c index b6f505b50e67..a3a4d07a763f 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -453,6 +453,7 @@ static void etm_event_start(struct perf_event *event, int flags) struct coresight_device *sink, *csdev = per_cpu(csdev_src, cpu); struct list_head *path; u64 hw_id; + u8 trace_id; if (!csdev) goto fail; @@ -519,11 +520,16 @@ static void etm_event_start(struct perf_event *event, int flags) */ if (!cpumask_test_cpu(cpu, &event_data->aux_hwid_done)) { cpumask_set_cpu(cpu, &event_data->aux_hwid_done); - hw_id = FIELD_PREP(CS_AUX_HW_ID_VERSION_MASK, - CS_AUX_HW_ID_CURR_VERSION); - hw_id |= FIELD_PREP(CS_AUX_HW_ID_TRACE_ID_MASK, - coresight_trace_id_read_cpu_id_map(cpu, - &sink->perf_sink_id_map)); + + trace_id = coresight_trace_id_read_cpu_id_map(cpu, &sink->perf_sink_id_map); + + hw_id = FIELD_PREP(CS_AUX_HW_ID_MAJOR_VERSION_MASK, + CS_AUX_HW_ID_MAJOR_VERSION); + hw_id |= FIELD_PREP(CS_AUX_HW_ID_MINOR_VERSION_MASK, + CS_AUX_HW_ID_MINOR_VERSION); + hw_id |= FIELD_PREP(CS_AUX_HW_ID_TRACE_ID_MASK, trace_id); + hw_id |= FIELD_PREP(CS_AUX_HW_ID_SINK_ID_MASK, coresight_get_sink_id(sink)); + perf_report_aux_output_id(event, hw_id); } diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h index 61a46d3bdcc8..05f891ca6b5c 100644 --- a/drivers/hwtracing/coresight/coresight-priv.h +++ b/drivers/hwtracing/coresight/coresight-priv.h @@ -148,6 +148,7 @@ int coresight_make_links(struct coresight_device *orig, struct coresight_device *target); void coresight_remove_links(struct coresight_device *orig, struct coresight_connection *conn); +u32 coresight_get_sink_id(struct coresight_device *csdev); #if IS_ENABLED(CONFIG_CORESIGHT_SOURCE_ETM3X) extern int etm_readl_cp14(u32 off, unsigned int *val); diff --git a/include/linux/coresight-pmu.h b/include/linux/coresight-pmu.h index 51ac441a37c3..89b0ac0014b0 100644 --- a/include/linux/coresight-pmu.h +++ b/include/linux/coresight-pmu.h @@ -49,12 +49,21 @@ * Interpretation of the PERF_RECORD_AUX_OUTPUT_HW_ID payload. * Used to associate a CPU with the CoreSight Trace ID. * [07:00] - Trace ID - uses 8 bits to make value easy to read in file. - * [59:08] - Unused (SBZ) - * [63:60] - Version + * [39:08] - Sink ID - as reported in /sys/bus/event_source/devices/cs_etm/sinks/ + * Added in minor version 1. + * [55:40] - Unused (SBZ) + * [59:56] - Minor Version - previously existing fields are compatible with + * all minor versions. + * [63:60] - Major Version - previously existing fields mean different things + * in new major versions. */ #define CS_AUX_HW_ID_TRACE_ID_MASK GENMASK_ULL(7, 0) -#define CS_AUX_HW_ID_VERSION_MASK GENMASK_ULL(63, 60) +#define CS_AUX_HW_ID_SINK_ID_MASK GENMASK_ULL(39, 8) -#define CS_AUX_HW_ID_CURR_VERSION 0 +#define CS_AUX_HW_ID_MINOR_VERSION_MASK GENMASK_ULL(59, 56) +#define CS_AUX_HW_ID_MAJOR_VERSION_MASK GENMASK_ULL(63, 60) + +#define CS_AUX_HW_ID_MAJOR_VERSION 0 +#define CS_AUX_HW_ID_MINOR_VERSION 1 #endif -- 2.34.1