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References: <20240604123922.331469-1-angelogioacchino.delregno@collabora.com> <20240604123922.331469-3-angelogioacchino.delregno@collabora.com>
In-Reply-To: <20240604123922.331469-3-angelogioacchino.delregno@collabora.com>
From: Chen-Yu Tsai <wenst@chromium.org>
Date: Wed, 5 Jun 2024 12:25:32 +0800
Message-ID: <CAGXv+5GXphBp-YMDtkNh1Q-FNQq4cmELR0tB6M==5tKptr8bZg@mail.gmail.com>
Subject: Re: [PATCH v2 2/2] drm/panfrost: Add support for Mali on the MT8188 SoC
To: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Cc: boris.brezillon@collabora.com, maarten.lankhorst@linux.intel.com, 
	mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, daniel@ffwll.ch, 
	robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, 
	steven.price@arm.com, matthias.bgg@gmail.com, dri-devel@lists.freedesktop.org, 
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, 
	linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org
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On Tue, Jun 4, 2024 at 8:39=E2=80=AFPM AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com> wrote:
>
> MediaTek MT8188 has a Mali-G57 MC3 (Valhall-JM): add a new
> compatible and platform data using the same supplies and the
> same power domain lists as MT8183 (one regulator, three power
> domains).
>
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@coll=
abora.com>

Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>

> ---
>  drivers/gpu/drm/panfrost/panfrost_drv.c | 9 +++++++++
>  1 file changed, 9 insertions(+)
>
> diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/pa=
nfrost/panfrost_drv.c
> index ef9f6c0716d5..4e2d9f671a0d 100644
> --- a/drivers/gpu/drm/panfrost/panfrost_drv.c
> +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c
> @@ -777,6 +777,14 @@ static const struct panfrost_compatible mediatek_mt8=
186_data =3D {
>         .pm_features =3D BIT(GPU_PM_CLK_DIS) | BIT(GPU_PM_VREG_OFF),
>  };
>
> +static const struct panfrost_compatible mediatek_mt8188_data =3D {
> +       .num_supplies =3D ARRAY_SIZE(mediatek_mt8183_b_supplies) - 1,
> +       .supply_names =3D mediatek_mt8183_b_supplies,
> +       .num_pm_domains =3D ARRAY_SIZE(mediatek_mt8183_pm_domains),
> +       .pm_domain_names =3D mediatek_mt8183_pm_domains,
> +       .pm_features =3D BIT(GPU_PM_CLK_DIS) | BIT(GPU_PM_VREG_OFF),
> +};
> +
>  static const char * const mediatek_mt8192_supplies[] =3D { "mali", NULL =
};
>  static const char * const mediatek_mt8192_pm_domains[] =3D { "core0", "c=
ore1", "core2",
>                                                            "core3", "core=
4" };
> @@ -808,6 +816,7 @@ static const struct of_device_id dt_match[] =3D {
>         { .compatible =3D "mediatek,mt8183-mali", .data =3D &mediatek_mt8=
183_data },
>         { .compatible =3D "mediatek,mt8183b-mali", .data =3D &mediatek_mt=
8183_b_data },
>         { .compatible =3D "mediatek,mt8186-mali", .data =3D &mediatek_mt8=
186_data },
> +       { .compatible =3D "mediatek,mt8188-mali", .data =3D &mediatek_mt8=
188_data },
>         { .compatible =3D "mediatek,mt8192-mali", .data =3D &mediatek_mt8=
192_data },
>         {}
>  };
> --
> 2.45.1
>
>