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[209.85.219.170]) by smtp.gmail.com with ESMTPSA id 00721157ae682-62c766b5410sm21438697b3.123.2024.06.05.00.43.28 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 05 Jun 2024 00:43:28 -0700 (PDT) Received: by mail-yb1-f170.google.com with SMTP id 3f1490d57ef6-df78b040314so2055842276.0; Wed, 05 Jun 2024 00:43:28 -0700 (PDT) X-Forwarded-Encrypted: i=1; AJvYcCXx+3svPW7PRZDHDPHFjs6L0Ss7vUMgL/DVUDbYfJGsp/uUWMBIltQSy+Fzlm3qKYyJjSD3gWMEVjJSIs9QyV2O4/0qhUp/phkqJPRwyQUnDF8oYuf5H87xDCDmxvYn6M0p5S7ptrwQ8O3cNZT7myyXta1eS2Fq5CT9rXNc/cL5taG+H19rIGnHXQA6 X-Received: by 2002:a25:2e02:0:b0:dc6:ff32:aae2 with SMTP id 3f1490d57ef6-dfacad0d872mr1549271276.63.1717573408106; Wed, 05 Jun 2024 00:43:28 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240604173710.534132-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20240604173710.534132-3-prabhakar.mahadev-lad.rj@bp.renesas.com> In-Reply-To: <20240604173710.534132-3-prabhakar.mahadev-lad.rj@bp.renesas.com> From: Geert Uytterhoeven Date: Wed, 5 Jun 2024 09:43:16 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v5 2/2] irqchip/renesas-rzg2l: Add support for RZ/Five SoC To: Prabhakar Cc: Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Magnus Damm , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Biju Das , Lad Prabhakar Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Prabhakar, On Tue, Jun 4, 2024 at 7:37=E2=80=AFPM Prabhakar wrote: > From: Lad Prabhakar > > The IX45 block has additional mask registers (NMSK/IMSK/TMSK) compared > to the RZ/G2L (family) SoC. > > A new rzfive_irqc_chip irq_chip is introduced for RZ/Five, where function > pointers for irq_(un)mask and irq_(dis/en)able handle the (un)masking > of the interrupts. The irq_chip pointer is now passed as an init callback > and stored in the priv pointer to differentiate between RZ/G2L and RZ/Fiv= e. > > Signed-off-by: Lad Prabhakar > Reviewed-by: Geert Uytterhoeven > --- > Hi Geert, I've restored your RB tag with v5 change (hope that's OK) Thanks, LGTM! > > Cheers, Prabhakar > > v4->v5 > - Reversed the operations in rzfive_irqc_irq_disable(). I assume you will send a patch to fix the order in rzg2l_irqc_irq_disable(), too? "git grep -wW irq_chip_[a-z]*able_parent" reveals a few more offenders... Gr{oetje,eeting}s, Geert --=20 Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k= .org In personal conversations with technical people, I call myself a hacker. Bu= t when I'm talking to journalists I just say "programmer" or something like t= hat. -- Linus Torvalds