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[209.85.219.178]) by smtp.gmail.com with ESMTPSA id 00721157ae682-62c765e715esm21584027b3.56.2024.06.05.01.28.58 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 05 Jun 2024 01:28:58 -0700 (PDT) Received: by mail-yb1-f178.google.com with SMTP id 3f1490d57ef6-dfa4876a5bbso5981409276.2; Wed, 05 Jun 2024 01:28:58 -0700 (PDT) X-Forwarded-Encrypted: i=1; AJvYcCWsnEgw+vTQWWRHdYIWA4523CerSrM8Z/n/tIgUggDz2qhjkV1/OgQWdKbtTrfq3DUjmn0swhyeSqbT2wDrEqrE0dNAkkDBG2E+4KSeAkDHjY1KZbNAmSoV9/gYT+b/VMm0+mM21frChtj3GHqwxyB/wKAeU/H46g//lmP0GWJj5D/8eOMEHxjMy3CObsxJ8C87WliTV42X/eJJ0YTCfLQXLWTkyq7e X-Received: by 2002:a05:6902:4cc:b0:df4:da84:195e with SMTP id 3f1490d57ef6-dfacac47b76mr1560204276.22.1717576138150; Wed, 05 Jun 2024 01:28:58 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240524082800.333991-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20240524082800.333991-3-prabhakar.mahadev-lad.rj@bp.renesas.com> In-Reply-To: From: Geert Uytterhoeven Date: Wed, 5 Jun 2024 10:28:45 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 2/4] dt-bindings: clock: Add R9A09G057 CPG Clock and Reset Definitions To: Prabhakar Cc: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Magnus Damm , linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Fabrizio Castro , Lad Prabhakar , Greg KH Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Prabhakar, CC Greg On Tue, Jun 4, 2024 at 5:46=E2=80=AFPM Geert Uytterhoeven wrote: > On Fri, May 24, 2024 at 10:29=E2=80=AFAM Prabhakar wrote: > > From: Lad Prabhakar > > > > Define RZ/V2H(P) (R9A09G057) Clock Pulse Generator module clock outputs > > (CPG_CLK_ON* registers), and reset definitions (CPG_RST_* registers) > > in Section 4.4.2 and 4.4.3 ("List of Clock/Reset Signals") of the RZ/V2= H(P) > > Hardware User's Manual (Rev.1.01, Feb. 2024). > > Hmm, I must have a slightly different Rev. 1.01 ;-) > > > Signed-off-by: Lad Prabhakar > > > --- /dev/null > > +++ b/include/dt-bindings/clock/r9a09g057-cpg.h > > +/* Clock list */ > > [...] > > > +#define R9A09G057_USB30_CLK_RESERVED0 197 > > +#define R9A09G057_USB30_CLK_RESERVED1 198 > > +#define R9A09G057_USB30_CLK_RESERVED2 199 > > +#define R9A09G057_USB30_CLK_RESERVED3 200 [...] It has been brought to my attention these had been named *RESERVED* deliberately, to avoid disclosing their meaning. As these definitions are part of the DT ABI, and the DTS writer has to relate the names to the actual clocks in the datasheet, and to the names used in the DT bindings for the consumer devices (if ever upstreamed), I find it hard to accept these for upstream inclusion as-is. What do other people think? Thanks! Gr{oetje,eeting}s, Geert --=20 Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k= .org In personal conversations with technical people, I call myself a hacker. Bu= t when I'm talking to journalists I just say "programmer" or something like t= hat. -- Linus Torvalds