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AJvYcCU6KsokBYcyUz5CH5YD5dzoS/ENB1zdlKJIyUpRv+gg+nrt0U8AsJaXAcc/aRk/UMY/BpPq2rQBrZloVH8Mvc2sQEs/QmOAs08JFrsDkmMqGAoc/TpZDNtcIwd7jc5/9hmCEAZ+shSWF37CpzX/OpEe5jE6xZjTHf9XGf0YRyhBsETo9kgcSoBwt5eCA1YBvMucthcWATE/jpkuTKWHwVfbxss2aFB7 X-Gm-Message-State: AOJu0YyRuUdvmtwnEAb098XzvvxdtRjOi32HFD6rAE0GA1uqekyYvCJq sxcIlha+LrV+96TUxExZN4ADoZi8Oe+fycPRcrTkW61c7+NgZrUTGbI6pH4nlzDxYKEQ41UFUWv W1B8NoMnh8VOsUFSGsevsis6eYzY= X-Received: by 2002:a05:6122:991:b0:4e4:ef4a:252d with SMTP id 71dfb90a1353d-4eb3a40cfc4mr2483049e0c.8.1717577637637; Wed, 05 Jun 2024 01:53:57 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240524082800.333991-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20240524082800.333991-3-prabhakar.mahadev-lad.rj@bp.renesas.com> In-Reply-To: From: "Lad, Prabhakar" Date: Wed, 5 Jun 2024 09:53:31 +0100 Message-ID: Subject: Re: [PATCH 2/4] dt-bindings: clock: Add R9A09G057 CPG Clock and Reset Definitions To: Geert Uytterhoeven Cc: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Magnus Damm , linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Fabrizio Castro , Lad Prabhakar , Greg KH Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Geert, On Wed, Jun 5, 2024 at 9:29=E2=80=AFAM Geert Uytterhoeven wrote: > > Hi Prabhakar, > > CC Greg > > On Tue, Jun 4, 2024 at 5:46=E2=80=AFPM Geert Uytterhoeven wrote: > > On Fri, May 24, 2024 at 10:29=E2=80=AFAM Prabhakar wrote: > > > From: Lad Prabhakar > > > > > > Define RZ/V2H(P) (R9A09G057) Clock Pulse Generator module clock outpu= ts > > > (CPG_CLK_ON* registers), and reset definitions (CPG_RST_* registers) > > > in Section 4.4.2 and 4.4.3 ("List of Clock/Reset Signals") of the RZ/= V2H(P) > > > Hardware User's Manual (Rev.1.01, Feb. 2024). > > > > Hmm, I must have a slightly different Rev. 1.01 ;-) > > > > > Signed-off-by: Lad Prabhakar > > > > > --- /dev/null > > > +++ b/include/dt-bindings/clock/r9a09g057-cpg.h > > > > +/* Clock list */ > > > > [...] > > > > > +#define R9A09G057_USB30_CLK_RESERVED0 197 > > > +#define R9A09G057_USB30_CLK_RESERVED1 198 > > > +#define R9A09G057_USB30_CLK_RESERVED2 199 > > > +#define R9A09G057_USB30_CLK_RESERVED3 200 > > [...] > > It has been brought to my attention these had been named *RESERVED* > deliberately, to avoid disclosing their meaning. > As these definitions are part of the DT ABI, and the DTS writer has to > relate the names to the actual clocks in the datasheet, and to the names > used in the DT bindings for the consumer devices (if ever upstreamed), > I find it hard to accept these for upstream inclusion as-is. > The other point I want to add is that the macros, which are designated as reserved, have been included to prevent any breakage of ABI. In the future, if we plan to add support for these IP blocks, these macros will be renamed accordingly and utilized in the CPG driver. Cheers, Prabhakar > What do other people think? > Thanks! > > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m6= 8k.org > > In personal conversations with technical people, I call myself a hacker. = But > when I'm talking to journalists I just say "programmer" or something like= that. > -- Linus Torvalds