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Wed, 5 Jun 2024 07:49:00 -0500 Received: from localhost ([10.249.48.175]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 455Cn0Zh058475; Wed, 5 Jun 2024 07:49:00 -0500 From: Hari Nagalla To: , , , , , CC: , , Subject: [PATCH v3 4/4] arm64: dts: ti: k3-am62a7-sk: Enable ipc with remote proc nodes Date: Wed, 5 Jun 2024 07:48:59 -0500 Message-ID: <20240605124859.3034-5-hnagalla@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240605124859.3034-1-hnagalla@ti.com> References: <20240605124859.3034-1-hnagalla@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 From: Devarsh Thakkar Reserve memory for remote rpoc IPC and bind the mailbox assignments for each remote proc. Two memory regions are reserved for each remote processor. The first region of 1Mb of memory is used for Vring shared buffers and the second region is used as external memory to the remote processor, resource table and as tracebuffer. Signed-off-by: Devarsh Thakkar Signed-off-by: Hari Nagalla --- arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 68 +++++++++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts index fa43cd0b631e..09bb8af53b1e 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts @@ -52,11 +52,40 @@ secure_ddr: optee@9e800000 { no-map; }; + wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 { + compatible = "shared-dma-pool"; + reg = <0x00 0x9c800000 0x00 0x100000>; + no-map; + }; + wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 { compatible = "shared-dma-pool"; reg = <0x00 0x9c900000 0x00 0x01e00000>; no-map; }; + mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@9b800000 { + compatible = "shared-dma-pool"; + reg = <0x00 0x9b800000 0x00 0x100000>; + no-map; + }; + + mcu_r5fss0_core0_memory_region: r5f-dma-memory@9b900000 { + compatible = "shared-dma-pool"; + reg = <0x00 0x9b900000 0x00 0x0f00000>; + no-map; + }; + + c7x_0_dma_memory_region: c7x-dma-memory@99800000 { + compatible = "shared-dma-pool"; + reg = <0x00 0x99800000 0x00 0x100000>; + no-map; + }; + + c7x_0_memory_region: c7x-memory@99900000 { + compatible = "shared-dma-pool"; + reg = <0x00 0x99900000 0x00 0x01efffff>; + no-map; + }; }; vmain_pd: regulator-0 { @@ -721,3 +750,42 @@ dpi1_out: endpoint { }; }; }; + +&mailbox0_cluster0 { + mbox_r5_0: mbox-r5-0 { + ti,mbox-rx = <0 0 0>; + ti,mbox-tx = <1 0 0>; + }; +}; + +&mailbox0_cluster1 { + mbox_c7x_0: mbox-c7x-0 { + ti,mbox-rx = <0 0 0>; + ti,mbox-tx = <1 0 0>; + }; +}; + +&mailbox0_cluster2 { + mbox_mcu_r5_0: mbox-mcu-r5-0 { + ti,mbox-rx = <0 0 0>; + ti,mbox-tx = <1 0 0>; + }; +}; + +&c7x_0 { + mboxes = <&mailbox0_cluster1>, <&mbox_c7x_0>; + memory-region = <&c7x_0_dma_memory_region>, + <&c7x_0_memory_region>; +}; + +&wkup_r5fss0_core0 { + mboxes = <&mailbox0_cluster0>, <&mbox_r5_0>; + memory-region = <&wkup_r5fss0_core0_dma_memory_region>, + <&wkup_r5fss0_core0_memory_region>; +}; + +&mcu_r5fss0_core0 { + mboxes = <&mailbox0_cluster2>, <&mbox_mcu_r5_0>; + memory-region = <&mcu_r5fss0_core0_dma_memory_region>, + <&mcu_r5fss0_core0_memory_region>; +}; -- 2.34.1