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From: Peng Fan <peng.fan@nxp.com>
To: Frank Li <frank.li@nxp.com>, Rob Herring <robh@kernel.org>, Krzysztof
 Kozlowski <krzk+dt@kernel.org>, Conor Dooley <conor+dt@kernel.org>, Shawn Guo
	<shawnguo@kernel.org>, Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
 Kernel Team <kernel@pengutronix.de>, Fabio Estevam <festevam@gmail.com>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
	<devicetree@vger.kernel.org>, "open list:ARM/FREESCALE IMX / MXC ARM
 ARCHITECTURE" <imx@lists.linux.dev>, "moderated list:ARM/FREESCALE IMX / MXC
 ARM ARCHITECTURE" <linux-arm-kernel@lists.infradead.org>, open list
	<linux-kernel@vger.kernel.org>
Subject: RE: [PATCH 1/1] arm64: dts: imx8dxl-evk: add imx8dxl_cm4, lsio mu5,
 related memory region
Thread-Topic: [PATCH 1/1] arm64: dts: imx8dxl-evk: add imx8dxl_cm4, lsio mu5,
 related memory region
Thread-Index: AQHat4b0yuXmSw/0t0K1zNfThU4QA7G59Ynw
Date: Thu, 6 Jun 2024 01:39:52 +0000
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References: <20240605202703.1220203-1-Frank.Li@nxp.com>
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> Subject: [PATCH 1/1] arm64: dts: imx8dxl-evk: add imx8dxl_cm4, lsio mu5,
> related memory region
>=20
> Add imx8dxl_cm4, lsio mu5 and related memory region.
>=20
> Signed-off-by: Frank Li <Frank.Li@nxp.com>

Reviewed-by: Peng Fan <peng.fan@nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/imx8dxl-evk.dts | 48 +++++++++++++++++++
>  1 file changed, 48 insertions(+)
>=20
> diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
> b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
> index 4ac96a0586294..c5e601b98cf8f 100644
> --- a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
> @@ -24,6 +24,19 @@ chosen {
>  		stdout-path =3D &lpuart0;
>  	};
>=20
> +	imx8dxl-cm4 {
> +		compatible =3D "fsl,imx8qxp-cm4";
> +		clocks =3D <&clk_dummy>;
> +		mbox-names =3D "tx", "rx", "rxdb";
> +		mboxes =3D <&lsio_mu5 0 1 &lsio_mu5 1 1 &lsio_mu5 3 1>;
> +		memory-region =3D <&vdevbuffer>, <&vdev0vring0>,
> <&vdev0vring1>,
> +				<&vdev1vring0>, <&vdev1vring1>,
> <&rsc_table>;
> +		power-domains =3D <&pd IMX_SC_R_M4_0_PID0>, <&pd
> IMX_SC_R_M4_0_MU_1A>;
> +		fsl,resource-id =3D <IMX_SC_R_M4_0_PID0>;
> +		fsl,entry-address =3D <0x34fe0000>;
> +	};
> +
> +
>  	memory@80000000 {
>  		device_type =3D "memory";
>  		reg =3D <0x00000000 0x80000000 0 0x40000000>; @@ -51,6
> +64,37 @@ linux,cma {
>  			alloc-ranges =3D <0 0x98000000 0 0x14000000>;
>  			linux,cma-default;
>  		};
> +
> +		vdev0vring0: memory0@90000000 {
> +			reg =3D <0 0x90000000 0 0x8000>;
> +			no-map;
> +		};
> +
> +		vdev0vring1: memory@90008000 {
> +			reg =3D <0 0x90008000 0 0x8000>;
> +			no-map;
> +		};
> +
> +		vdev1vring0: memory@90010000 {
> +			reg =3D <0 0x90010000 0 0x8000>;
> +			no-map;
> +		};
> +
> +		vdev1vring1: memory@90018000 {
> +			reg =3D <0 0x90018000 0 0x8000>;
> +			no-map;
> +		};
> +
> +		rsc_table: memory-rsc-table@900ff000 {
> +			reg =3D <0 0x900ff000 0 0x1000>;
> +			no-map;
> +		};
> +
> +		vdevbuffer: memory-vdevbuffer {
> +			compatible =3D "shared-dma-pool";
> +			reg =3D <0 0x90400000 0 0x100000>;
> +			no-map;
> +		};
>  	};
>=20
>  	m2_uart1_sel: regulator-m2uart1sel {
> @@ -505,6 +549,10 @@ &lpuart1 {
>  	status =3D "okay";
>  };
>=20
> +&lsio_mu5 {
> +	status =3D "okay";
> +};
> +
>  &flexcan2 {
>  	pinctrl-names =3D "default";
>  	pinctrl-0 =3D <&pinctrl_flexcan2>;
> --
> 2.34.1
>=20