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charset=us-ascii Content-Disposition: inline In-Reply-To: <20240605102457.4050539-2-vineeth.karumanchi@amd.com> > @@ -5224,17 +5257,38 @@ static int __maybe_unused macb_suspend(struct device *dev) > > if (bp->wol & MACB_WOL_ENABLED) { > spin_lock_irqsave(&bp->lock, flags); > - /* Flush all status bits */ > - macb_writel(bp, TSR, -1); > - macb_writel(bp, RSR, -1); > + > + /* Disable Tx and Rx engines before disabling the queues, > + * this is mandatory as per the IP spec sheet > + */ > + tmp = macb_readl(bp, NCR); > + macb_writel(bp, NCR, tmp & ~(MACB_BIT(TE) | MACB_BIT(RE))); Is there any need to wait for this to complete? What if there is a DMA transaction in flight? Andrew