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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Siddharth Vadapalli Cc: Andrew Lunn , srk@ti.com, vigneshr@ti.com, danishanwar@ti.com, pekka Varis , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org, Roger Quadros X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=2148; i=rogerq@kernel.org; h=from:subject:message-id; bh=X1m6b6lelnlNBB+WcqOljMIeenc6jY9qHrvKkYzdDQI=; b=owEBbQKS/ZANAwAIAdJaa9O+djCTAcsmYgBmYacAETk11b9CoCcsF4T8hXWudESgQWgRlNsrs ypx6I/ni0yJAjMEAAEIAB0WIQRBIWXUTJ9SeA+rEFjSWmvTvnYwkwUCZmGnAAAKCRDSWmvTvnYw k/xtD/0Qg2wSJ84gHz13CawwmbxCntS8LAShukgHheXdAXEvM6620f95TSiBtpzCHjGrv9jgjoc L1wEh972EsUde9YB99oiss24dqtJ2v4LLlW/gTFODCKr0V3SNmrF8Iue4nzTwYrLxVW2NQN9LC7 yOxl5fTkgICLfuFh1f7cv/oleMUeSKtUqpMRiWNVRhFH7Fb8F58mLvzU6ZSvKtbaWN4eDOdClRY GJm9IGpC7JHgRYgkwtdEGzMGNZKu0Hs4wtt5ju75jYgrP8/6iFIUI6mqCuvdNMEezHeEpOJI8Xl 9UQ/u8uaJFSncEdhxiT/tg3eg+ngaoGS7jZEmYOKQL0smqqdYyPmSgtsHZhWMhHGuJeckbG9Mn9 DuEzraB0aXjr7nTfJTYzYGVNS6iTouVz9/ZVH9KJmMTt5bqdvOo7av4RSZAm3PIfCZ6qtAYg/0I 7+r7Mgz3qkCPJvzBZkVrMrSAQ/HmwSHtHyu3MhwZvFZlvG/4h6gYBPxnyQ7xXsNX73au737Tr7R O3RbVliDR1BsCHqMrFDe3krxWxuezFwaB4+Nr9Q5OULkjs0B6Qp+utZvpMMSZ3rDF2/uL+meY8g CVvGjYuO0DXurJjt6NfLU2WmIlddSWBsKTXAOD19XZYwWOfx5fWgYKZDrPHcBYJSzCTMWOj79Hv kTNOdMzXeb3UwVw== X-Developer-Key: i=rogerq@kernel.org; a=openpgp; fpr=412165D44C9F52780FAB1058D25A6BD3BE763093 Hi, am65-cpsw can support up to 8 queues at Rx. So far we have been using only one queue (i.e. default flow) for all RX traffic. This series adds multi-queue support. The driver starts with 1 RX queue by default. User can increase the RX queues via ethtool, e.g. 'ethtool ethx -L rx ' The series also adds regmap and regfield support to some of the ALE registers. It adds Policer/Classifier registers and fields. Converting the existing ALE control APIs to regfields can be a separate exercise. Some helper functions are added to read/write to the Policer/Classifier registers and a default Classifier setup function is added that routes packets based on their PCP/DSCP priority to different RX queues. 'RFC' because I had to revert the RX coalesing patch [1] to apply this series. I still need to work out how this will work together with RX coalescing. Series is based on v6.9 [1] e4918f9d4882 ("net: ethernet: ti: am65-cpsw: add sw tx/rx irq coalescing based on hrtimers") Signed-off-by: Roger Quadros --- Roger Quadros (7): net: ethernet: ti: am65-cpsw: Introduce multi queue Rx net: ethernet: ti: cpsw_ale: use regfields for ALE registers net: ethernet: ti: cpsw_ale: use regfields for number of Entries and Policers net: ethernet: ti: cpsw_ale: add Policer and Thread control register fields net: ethernet: ti: cpsw_ale: add policer/classifier helpers net: ethernet: ti: cpsw_ale: add helper to setup classifier defaults net: ethernet: ti: am65-cpsw: setup priority to flow mapping drivers/net/ethernet/ti/am65-cpsw-ethtool.c | 5 +- drivers/net/ethernet/ti/am65-cpsw-nuss.c | 197 +++++++++++--------- drivers/net/ethernet/ti/am65-cpsw-nuss.h | 25 ++- drivers/net/ethernet/ti/cpsw_ale.c | 273 +++++++++++++++++++++++++--- drivers/net/ethernet/ti/cpsw_ale.h | 62 ++++++- 5 files changed, 437 insertions(+), 125 deletions(-) --- base-commit: bc4f675ad79dd6f081e36ca45b27eac8ee60e29f change-id: 20240606-am65-cpsw-multi-rx-fb6cf8dea5eb Best regards, -- Roger Quadros