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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Richard Cochran , Jose Abreu , Liam Girdwood , Mark Brown Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: <20240604143502.154463-1-christophe.roullier@foss.st.com> <20240604143502.154463-8-christophe.roullier@foss.st.com> <3c40352b-ad69-4847-b665-e7b2df86a684@denx.de> <73f7b4a4-31d1-4907-b83b-2ac7758edf0d@foss.st.com> Content-Language: en-US From: Marek Vasut In-Reply-To: <73f7b4a4-31d1-4907-b83b-2ac7758edf0d@foss.st.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean On 6/6/24 4:19 PM, Christophe ROULLIER wrote: Hi, >>> @@ -348,8 +360,15 @@ static int stm32_dwmac_parse_data(struct >>> stm32_dwmac *dwmac, >>>           return PTR_ERR(dwmac->regmap); >>>         err = of_property_read_u32_index(np, "st,syscon", 1, >>> &dwmac->mode_reg); >>> -    if (err) >>> +    if (err) { >>>           dev_err(dev, "Can't get sysconfig mode offset (%d)\n", err); >>> +        return err; >>> +    } >>> + >>> +    dwmac->mode_mask = SYSCFG_MP1_ETH_MASK; >>> +    err = of_property_read_u32_index(np, "st,syscon", 2, >>> &dwmac->mode_mask); >>> +    if (err) >>> +        pr_debug("Warning sysconfig register mask not set\n"); >> >> I _think_ you need to left-shift the mode mask by 8 for STM32MP13xx >> second GMAC somewhere in here, right ? >> > The shift is performed in function stm32mp1_configure_pmcr: > >     /* Shift value at correct ethernet MAC offset in SYSCFG_PMCSETR */ >     val <<= ffs(dwmac->mode_mask) - ffs(SYSCFG_MP1_ETH_MASK); > > In case of MP13 Ethernet1 or MP15, shift equal 0 > > In case of MP13 Ethernet2 , shift equal 8  ;-) Oh, good, thanks !