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[2001:14ba:a0c3:3a00::227]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-2ead41b05f1sm2390791fa.78.2024.06.06.08.55.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 06 Jun 2024 08:55:51 -0700 (PDT) Date: Thu, 6 Jun 2024 18:55:50 +0300 From: Dmitry Baryshkov To: Konrad Dybcio Cc: Rob Clark , Sean Paul , Abhinav Kumar , David Airlie , Daniel Vetter , Marijn Suijten , Rob Clark , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Connor Abbott Subject: Re: [PATCH] drm/msm/a6xx: Fix A702 UBWC mode Message-ID: <7mvu3xeosx45eorr277f47tb4ymujr7lu5m3vytfcphasxsxnw@qtia62v4bi5k> References: <20240606-topic-a702_ubwcmode-v1-1-283fa9588af8@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240606-topic-a702_ubwcmode-v1-1-283fa9588af8@linaro.org> On Thu, Jun 06, 2024 at 01:10:49PM +0200, Konrad Dybcio wrote: > UBWC_MODE is a one-bit-wide field, so a value of 2 is obviously bogus. > > Replace it with the correct value (0). > > Fixes: 18397519cb62 ("drm/msm/adreno: Add A702 support") > Reported-by: Connor Abbott > Closes: https://lore.kernel.org/linux-arm-msm/CACu1E7FTN=kwaDJMNiTmFspALzj2+Q-nvsN5ugi=vz4RdUGvGw@mail.gmail.com/ > Signed-off-by: Konrad Dybcio > --- > drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > Reviewed-by: Dmitry Baryshkov -- With best wishes Dmitry