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[80.145.83.235]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-42158102af1sm61361915e9.16.2024.06.06.09.49.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 06 Jun 2024 09:49:11 -0700 (PDT) From: "Uwe =?utf-8?Q?Kleine-K=C3=B6nig?=" X-Google-Original-From: Uwe =?utf-8?Q?Kleine-K=C3=B6nig?= Date: Thu, 6 Jun 2024 18:49:10 +0200 To: Trevor Gamblin Cc: linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org, michael.hennerich@analog.com, nuno.sa@analog.com, dlechner@baylibre.com, devicetree@vger.kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Subject: Re: [RESEND][PATCH 0/2 v6] pwm: add axi-pwm-gen driver Message-ID: References: <20240605203507.1934434-1-tgamblin@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="reyzrg4yf7eenh64" Content-Disposition: inline In-Reply-To: <20240605203507.1934434-1-tgamblin@baylibre.com> --reyzrg4yf7eenh64 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hello Trevor, On Wed, Jun 05, 2024 at 04:35:04PM -0400, Trevor Gamblin wrote: > Resending due to missing real name in "From:" line. >=20 > This series adds support for the AXI PWM GEN subsystem found on FPGA IP > cores. It can be used to generate configurable PWM outputs, and includes > options for external synchronization and clock signals. The work is > being done on behalf of, and therefore lists maintainers from Analog > Devices, Inc. >=20 > The series has been tested on actual hardware using an EVAL-AD7985FMCZ > evaluation board. An oscilloscope was used to validate that the > generated PWM signal matched the requested one. >=20 > There was previously a follow-up series > (https://lore.kernel.org/linux-pwm/20240314204722.1291993-1-tgamblin@bayl= ibre.com/) > that enabled support for two different versions of the AXI PWM GEN IP. > Since issues were identified with the v1 IP functionality and v2's > regmap is the one listed on the device wiki > (https://analogdevicesinc.github.io/hdl/library/axi_pwm_gen/index.html), > the driver was changed to support only the v2 IP after squashing those > additions. As a result, the overall driver is simpler as it no longer > uses an axi_pwm_variant struct. Support for v1 IP can be added back > later in the event that it is required. I found a minor nitpick in your patch. I applied it anyhow and jumped at the patch opportunity myself. Patch in your inbox (or at https://lore.kernel.org/linux-pwm/20240606164047.534741-6-u.kleine-koenig@b= aylibre.com) Best regards and thanks for your contribution! Uwe --reyzrg4yf7eenh64 Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEEP4GsaTp6HlmJrf7Tj4D7WH0S/k4FAmZh6IIACgkQj4D7WH0S /k5jMgf/QgQYjCo0fHzsyrRbeEkabbKST7oz2dDGTe+6SpEgxK+krU45hdMQI7hX y5kpSC7CZO1u50/LUIwjXX6wrLeipcVHWhLqc2PCdQxMExWJwf/kClGEcE4lEZpm Kb/kJYjoz0GDmBPF8EoFnacvJSbTddC5SSGEh4+mELSSLctgp0g08/5+2NlbkX57 rz0lh3+QTI79KQ6+AS/5RYXK/y6CHNDFv9e8k/VkexVmKuwMX9SEKPRqu07wnh+4 y/wcwRwpvtPyR9zgAOsaui0V69Mghy6HExyhpJkcWVD5+wOK34gbq10GMvk1Cpy3 2O4NY7enbdjhFbL3cbxKDG4aWVy5fQ== =5lHp -----END PGP SIGNATURE----- --reyzrg4yf7eenh64--