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Fri, 7 Jun 2024 00:53:43 GMT Received: from hu-amelende-lv.qualcomm.com (10.49.16.6) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 6 Jun 2024 17:53:43 -0700 From: Anjelique Melendez To: , , , , CC: , , , , , , , , Subject: [PATCH 2/2] leds: rgb: leds-qcom-lpg: Fix line wrapping style issues Date: Thu, 6 Jun 2024 17:52:52 -0700 Message-ID: <20240607005250.4047135-2-quic_amelende@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240607005250.4047135-1-quic_amelende@quicinc.com> References: <20240607005250.4047135-1-quic_amelende@quicinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: nalasex01b.na.qualcomm.com (10.47.209.197) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: sNkGu40M66iwJ5SrTOo79ro1ET6kOgoo X-Proofpoint-ORIG-GUID: sNkGu40M66iwJ5SrTOo79ro1ET6kOgoo X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-06_20,2024-06-06_02,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 impostorscore=0 bulkscore=0 mlxscore=0 priorityscore=1501 clxscore=1015 suspectscore=0 spamscore=0 mlxlogscore=999 adultscore=0 phishscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2405170001 definitions=main-2406070005 Fix line wrapping style issues introduced in previous patches. Signed-off-by: Anjelique Melendez --- drivers/leds/rgb/leds-qcom-lpg.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/drivers/leds/rgb/leds-qcom-lpg.c b/drivers/leds/rgb/leds-qcom-lpg.c index e74b2ceed1c2..7c35b3ba09a3 100644 --- a/drivers/leds/rgb/leds-qcom-lpg.c +++ b/drivers/leds/rgb/leds-qcom-lpg.c @@ -620,6 +620,7 @@ static void lpg_sdam_apply_lut_control(struct lpg_channel *chan) u8 val = 0, conf = 0, lut_offset = 0; unsigned int hi_pause, lo_pause; struct lpg *lpg = chan->lpg; + u16 addr; if (!chan->ramp_enabled || chan->pattern_lo_idx == chan->pattern_hi_idx) return; @@ -640,17 +641,23 @@ static void lpg_sdam_apply_lut_control(struct lpg_channel *chan) lo_idx += lut_offset; } - nvmem_device_write(lpg_chan_sdam, SDAM_PBS_SCRATCH_LUT_COUNTER_OFFSET + chan->sdam_offset, 1, &val); - nvmem_device_write(lpg_chan_sdam, SDAM_PATTERN_CONFIG_OFFSET + chan->sdam_offset, 1, &conf); - nvmem_device_write(lpg_chan_sdam, SDAM_END_INDEX_OFFSET + chan->sdam_offset, 1, &hi_idx); - nvmem_device_write(lpg_chan_sdam, SDAM_START_INDEX_OFFSET + chan->sdam_offset, 1, &lo_idx); + addr = SDAM_PBS_SCRATCH_LUT_COUNTER_OFFSET + chan->sdam_offset; + nvmem_device_write(lpg_chan_sdam, addr, 1, &val); + addr = SDAM_PATTERN_CONFIG_OFFSET + chan->sdam_offset; + nvmem_device_write(lpg_chan_sdam, addr, 1, &conf); + addr = SDAM_END_INDEX_OFFSET + chan->sdam_offset; + nvmem_device_write(lpg_chan_sdam, addr, 1, &hi_idx); + addr = SDAM_START_INDEX_OFFSET + chan->sdam_offset; + nvmem_device_write(lpg_chan_sdam, addr, 1, &lo_idx); val = RAMP_STEP_DURATION(chan->ramp_tick_ms); nvmem_device_write(lpg_chan_sdam, SDAM_REG_RAMP_STEP_DURATION, 1, &val); if (lpg->lut_sdam) { - nvmem_device_write(lpg_chan_sdam, SDAM_PAUSE_HI_MULTIPLIER_OFFSET + chan->sdam_offset, 1, &hi_pause); - nvmem_device_write(lpg_chan_sdam, SDAM_PAUSE_LO_MULTIPLIER_OFFSET + chan->sdam_offset, 1, &lo_pause); + addr = SDAM_PAUSE_HI_MULTIPLIER_OFFSET + chan->sdam_offset; + nvmem_device_write(lpg_chan_sdam, addr, 1, &hi_pause); + addr = SDAM_PAUSE_LO_MULTIPLIER_OFFSET + chan->sdam_offset; + nvmem_device_write(lpg_chan_sdam, addr, 1, &lo_pause); } } -- 2.34.1